389 		iwl_read_prph(trans, OSC_CLK);  in iwl_pcie_apm_init()
390 		iwl_read_prph(trans, OSC_CLK);  in iwl_pcie_apm_init()
392 		iwl_read_prph(trans, OSC_CLK);  in iwl_pcie_apm_init()
393 		iwl_read_prph(trans, OSC_CLK);  in iwl_pcie_apm_init()
947 			if (iwl_read_prph(trans, addr) & BIT(val)) {  in iwl_pcie_apply_destination()
1043 			iwl_read_prph(trans, WFPM_GP2));  in iwl_pcie_load_given_ucode_8000()
2310 	status = iwl_read_prph(trans, SCD_QUEUE_STATUS_BITS(txq_id));  in iwl_trans_pcie_log_scd_error()
2319 		iwl_read_prph(trans, SCD_QUEUE_RDPTR(txq_id)) &  in iwl_trans_pcie_log_scd_error()
2321 			iwl_read_prph(trans, SCD_QUEUE_WRPTR(txq_id)) &  in iwl_trans_pcie_log_scd_error()
2860 	write_ptr = iwl_read_prph(trans, write_ptr_addr) * sizeof(u32);  in iwl_dbgfs_monitor_data_read()
2861 	wrap_cnt = iwl_read_prph(trans, wrap_cnt_addr);  in iwl_dbgfs_monitor_data_read()
3102 	write_ptr_val = iwl_read_prph(trans, write_ptr);  in iwl_trans_pcie_dump_pointers()
3104 		cpu_to_le32(iwl_read_prph(trans, wrap_cnt));  in iwl_trans_pcie_dump_pointers()
3106 		cpu_to_le32(iwl_read_prph(trans, base));  in iwl_trans_pcie_dump_pointers()
3109 			cpu_to_le32(iwl_read_prph(trans, base_high));  in iwl_trans_pcie_dump_pointers()
3147 				base = (iwl_read_prph(trans, base) &  in iwl_trans_pcie_dump_monitor()
3153 				base = iwl_read_prph(trans, base) <<  in iwl_trans_pcie_dump_monitor()
3188 			cfg_reg = iwl_read_prph(trans, cfg_reg);  in iwl_trans_get_fw_monitor_len()
3202 			base = iwl_read_prph(trans, base) <<  in iwl_trans_get_fw_monitor_len()
3204 			end = iwl_read_prph(trans, end) <<  in iwl_trans_get_fw_monitor_len()