688 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_iqk_path_a()
690 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_iqk_path_a()
729 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00);  in rtl8192eu_rx_iqk_path_a()
742 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_rx_iqk_path_a()
777 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_a()
787 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_a()
799 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_rx_iqk_path_a()
825 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_a()
845 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_iqk_path_b()
847 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_iqk_path_b()
849 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_iqk_path_b()
850 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_iqk_path_b()
892 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_b()
905 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_rx_iqk_path_b()
943 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_b()
953 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_b()
965 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_rx_iqk_path_b()
992 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_rx_iqk_path_b()
1075 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_phy_iqcalibrate()
1115 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_phy_iqcalibrate()
1117 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_phy_iqcalibrate()
1122 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000);  in rtl8192eu_phy_iqcalibrate()
1158 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x00000000);  in rtl8192eu_phy_iqcalibrate()