569 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
571 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_iqk_path_a()
606 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
609 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_iqk_path_a()
642 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
644 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_iqk_path_a()
679 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
681 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
716 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
719 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
752 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
754 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
782 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
784 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
820 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
823 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
851 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
853 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
939 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
941 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
960 			val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
962 			rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
1003 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1005 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
1008 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1011 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
1049 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1051 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
1632 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_init_statistics()
1634 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_init_statistics()