74 	dev_info(zd_chip_dev(chip), "%s\n", buffer);  in print_id()
118 		dev_dbg_f(zd_chip_dev(chip),  in zd_ioread32v_locked()
163 		dev_dbg_f(zd_chip_dev(chip),  in _zd_iowrite32v_async_locked()
208 			dev_dbg_f(zd_chip_dev(chip),  in zd_iowrite16a_locked()
245 			dev_dbg_f(zd_chip_dev(chip),  in zd_iowrite32a_locked()
326 	dev_dbg_f(zd_chip_dev(chip), "E2P_POD %#010x\n", value);  in read_pod()
343 	dev_dbg_f(zd_chip_dev(chip),  in read_pod()
377 		dev_dbg_f(zd_chip_dev(chip), "%s addr %pM\n", type, mac_addr);  in zd_write_mac_addr_common()
379 		dev_dbg_f(zd_chip_dev(chip), "set NULL %s\n", type);  in zd_write_mac_addr_common()
423 	dev_dbg_f(zd_chip_dev(chip), "regdomain: %#04x\n", *regdomain);  in zd_read_regdomain()
513 		dev_err(zd_chip_dev(chip), "error ioread32(CR_REG1): %d\n", r);  in zd_chip_lock_phy_regs()
521 		dev_err(zd_chip_dev(chip), "error iowrite32(CR_REG1): %d\n", r);  in zd_chip_lock_phy_regs()
533 		dev_err(zd_chip_dev(chip),  in zd_chip_unlock_phy_regs()
542 		dev_err(zd_chip_dev(chip), "error iowrite32(CR_REG1): %d\n", r);  in zd_chip_unlock_phy_regs()
559 	dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value >> 8);  in patch_cr157()
590 	dev_dbg_f(zd_chip_dev(chip), "patching for channel %d\n", channel);  in zd_chip_generic_patch_6m_band()
664 	dev_dbg_f(zd_chip_dev(chip), "\n");  in zd1211_hw_reset_phy()
746 	dev_dbg_f(zd_chip_dev(chip), "\n");  in zd1211b_hw_reset_phy()
773 	dev_dbg_f(zd_chip_dev(chip), "\n");  in zd1211_hw_init_hmac()
792 	dev_dbg_f(zd_chip_dev(chip), "\n");  in zd1211b_hw_init_hmac()
934 	dev_dbg_f(zd_chip_dev(chip), "\n");  in hw_init()
961 		dev_dbg_f(zd_chip_dev(chip),  in dump_cr()
966 	dev_dbg_f(zd_chip_dev(chip), "%s %#010x\n",  in dump_cr()
999 		dev_dbg_f(zd_chip_dev(chip), "error %d zd_ioread16v_locked\n",  in dump_fw_registers()
1004 	dev_dbg_f(zd_chip_dev(chip), "FW_FIRMWARE_VER %#06hx\n", values[0]);  in dump_fw_registers()
1005 	dev_dbg_f(zd_chip_dev(chip), "FW_USB_SPEED %#06hx\n", values[1]);  in dump_fw_registers()
1006 	dev_dbg_f(zd_chip_dev(chip), "FW_FIX_TX_RATE %#06hx\n", values[2]);  in dump_fw_registers()
1007 	dev_dbg_f(zd_chip_dev(chip), "FW_LINK_STATUS %#06hx\n", values[3]);  in dump_fw_registers()
1022 	dev_info(zd_chip_dev(chip),"firmware version %04hx\n", version);  in print_fw_version()
1052 	dev_dbg_f(zd_chip_dev(chip), "preamble=%x\n", preamble);  in zd_chip_set_rts_cts_rate_locked()
1099 	dev_dbg_f(zd_chip_dev(chip), "fw_regs_base: %#06hx\n",  in read_fw_regs_offset()
1108 	dev_dbg_f(zd_chip_dev(chip), "\n");  in zd_chip_read_mac_addr_fw()
1118 	dev_dbg_f(zd_chip_dev(chip), "\n");  in zd_chip_init_hw()
1257 	dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value & 0xff);  in patch_cck_gain()