724 	u32 ctrl0, ctrl1;  in chv_pin_dbg_show()  local
729 	ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0));  in chv_pin_dbg_show()
735 	if (ctrl0 & CHV_PADCTRL0_GPIOEN) {  in chv_pin_dbg_show()
740 		mode = ctrl0 & CHV_PADCTRL0_PMODE_MASK;  in chv_pin_dbg_show()
746 	seq_printf(s, "0x%08x 0x%08x", ctrl0, ctrl1);  in chv_pin_dbg_show()
942 	u32 ctrl0;  in chv_gpio_set_direction()  local
946 	ctrl0 = readl(reg) & ~CHV_PADCTRL0_GPIOCFG_MASK;  in chv_gpio_set_direction()
948 		ctrl0 |= CHV_PADCTRL0_GPIOCFG_GPI << CHV_PADCTRL0_GPIOCFG_SHIFT;  in chv_gpio_set_direction()
950 		ctrl0 |= CHV_PADCTRL0_GPIOCFG_GPO << CHV_PADCTRL0_GPIOCFG_SHIFT;  in chv_gpio_set_direction()
951 	chv_writel(ctrl0, reg);  in chv_gpio_set_direction()
974 	u32 ctrl0, ctrl1;  in chv_config_get()  local
979 	ctrl0 = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0));  in chv_config_get()
983 	term = (ctrl0 & CHV_PADCTRL0_TERM_MASK) >> CHV_PADCTRL0_TERM_SHIFT;  in chv_config_get()
992 		if (!(ctrl0 & CHV_PADCTRL0_TERM_UP))  in chv_config_get()
1010 		if (!term || (ctrl0 & CHV_PADCTRL0_TERM_UP))  in chv_config_get()
1032 		cfg = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK;  in chv_config_get()
1053 	u32 ctrl0, pull;  in chv_config_set_pull()  local
1056 	ctrl0 = readl(reg);  in chv_config_set_pull()
1060 		ctrl0 &= ~(CHV_PADCTRL0_TERM_MASK | CHV_PADCTRL0_TERM_UP);  in chv_config_set_pull()
1064 		ctrl0 &= ~(CHV_PADCTRL0_TERM_MASK | CHV_PADCTRL0_TERM_UP);  in chv_config_set_pull()
1082 		ctrl0 |= CHV_PADCTRL0_TERM_UP | pull;  in chv_config_set_pull()
1086 		ctrl0 &= ~(CHV_PADCTRL0_TERM_MASK | CHV_PADCTRL0_TERM_UP);  in chv_config_set_pull()
1100 		ctrl0 |= pull;  in chv_config_set_pull()
1108 	chv_writel(ctrl0, reg);  in chv_config_set_pull()
1241 	u32 ctrl0, cfg;  in chv_gpio_get()  local
1244 	ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0));  in chv_gpio_get()
1247 	cfg = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK;  in chv_gpio_get()
1251 		return !!(ctrl0 & CHV_PADCTRL0_GPIOTXSTATE);  in chv_gpio_get()
1252 	return !!(ctrl0 & CHV_PADCTRL0_GPIORXSTATE);  in chv_gpio_get()
1260 	u32 ctrl0;  in chv_gpio_set()  local
1265 	ctrl0 = readl(reg);  in chv_gpio_set()
1268 		ctrl0 |= CHV_PADCTRL0_GPIOTXSTATE;  in chv_gpio_set()
1270 		ctrl0 &= ~CHV_PADCTRL0_GPIOTXSTATE;  in chv_gpio_set()
1272 	chv_writel(ctrl0, reg);  in chv_gpio_set()
1280 	u32 ctrl0, direction;  in chv_gpio_get_direction()  local
1284 	ctrl0 = readl(chv_padreg(pctrl, offset, CHV_PADCTRL0));  in chv_gpio_get_direction()
1287 	direction = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK;  in chv_gpio_get_direction()