Lines Matching refs:SIRFSOC_GPIO_CTRL
346 SIRFSOC_GPIO_CTRL(i, j)); in sirfsoc_pinmux_suspend_noirq()
369 SIRFSOC_GPIO_CTRL(i, j)); in sirfsoc_pinmux_resume_noirq()
429 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_irq_ack()
447 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in __sirfsoc_gpio_irq_mask()
477 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_irq_unmask()
498 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_irq_type()
580 ctrl = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, idx)); in sirfsoc_gpio_handle_irq()
625 sirfsoc_gpio_set_input(sgpio, SIRFSOC_GPIO_CTRL(bank->id, offset)); in sirfsoc_gpio_request()
642 sirfsoc_gpio_set_input(sgpio, SIRFSOC_GPIO_CTRL(bank->id, offset)); in sirfsoc_gpio_free()
657 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_direction_input()
700 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_direction_output()
720 val = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset)); in sirfsoc_gpio_get_value()
737 ctrl = readl(sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset)); in sirfsoc_gpio_set_value()
742 writel(ctrl, sgpio->chip.regs + SIRFSOC_GPIO_CTRL(bank->id, offset)); in sirfsoc_gpio_set_value()
755 u32 offset = SIRFSOC_GPIO_CTRL(i, n); in sirfsoc_gpio_set_pullup()
772 u32 offset = SIRFSOC_GPIO_CTRL(i, n); in sirfsoc_gpio_set_pulldown()