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Lines Matching refs:hwpwm

118 	if ((PWM_REG_PRESCAL(val, pwm->hwpwm) == PWM_PRESCAL_MASK) &&  in sun4i_pwm_get_state()
122 prescaler = prescaler_table[PWM_REG_PRESCAL(val, pwm->hwpwm)]; in sun4i_pwm_get_state()
127 if (val & BIT_CH(PWM_ACT_STATE, pwm->hwpwm)) in sun4i_pwm_get_state()
132 if ((val & BIT_CH(PWM_CLK_GATING | PWM_EN, pwm->hwpwm)) == in sun4i_pwm_get_state()
133 BIT_CH(PWM_CLK_GATING | PWM_EN, pwm->hwpwm)) in sun4i_pwm_get_state()
138 val = sun4i_pwm_readl(sun4i_pwm, PWM_CH_PRD(pwm->hwpwm)); in sun4i_pwm_get_state()
236 if (PWM_REG_PRESCAL(ctrl, pwm->hwpwm) != prescaler) { in sun4i_pwm_apply()
238 ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm); in sun4i_pwm_apply()
241 ctrl &= ~BIT_CH(PWM_PRESCAL_MASK, pwm->hwpwm); in sun4i_pwm_apply()
242 ctrl |= BIT_CH(prescaler, pwm->hwpwm); in sun4i_pwm_apply()
246 sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm)); in sun4i_pwm_apply()
247 sun4i_pwm->next_period[pwm->hwpwm] = jiffies + in sun4i_pwm_apply()
249 sun4i_pwm->needs_delay[pwm->hwpwm] = true; in sun4i_pwm_apply()
253 ctrl &= ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm); in sun4i_pwm_apply()
255 ctrl |= BIT_CH(PWM_ACT_STATE, pwm->hwpwm); in sun4i_pwm_apply()
257 ctrl |= BIT_CH(PWM_CLK_GATING, pwm->hwpwm); in sun4i_pwm_apply()
259 ctrl |= BIT_CH(PWM_EN, pwm->hwpwm); in sun4i_pwm_apply()
260 } else if (!sun4i_pwm->needs_delay[pwm->hwpwm]) { in sun4i_pwm_apply()
261 ctrl &= ~BIT_CH(PWM_EN, pwm->hwpwm); in sun4i_pwm_apply()
262 ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm); in sun4i_pwm_apply()
272 if (!sun4i_pwm->needs_delay[pwm->hwpwm]) { in sun4i_pwm_apply()
279 if (sun4i_pwm->needs_delay[pwm->hwpwm] && in sun4i_pwm_apply()
280 time_before(now, sun4i_pwm->next_period[pwm->hwpwm])) { in sun4i_pwm_apply()
281 delay_us = jiffies_to_usecs(sun4i_pwm->next_period[pwm->hwpwm] - in sun4i_pwm_apply()
288 sun4i_pwm->needs_delay[pwm->hwpwm] = false; in sun4i_pwm_apply()
292 ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm); in sun4i_pwm_apply()
293 ctrl &= ~BIT_CH(PWM_EN, pwm->hwpwm); in sun4i_pwm_apply()