64 #define rtc1_write(offset, value)	writew((value), rtc1_base + (offset))  macro
102 	rtc1_write(ETIMELREG, (uint16_t)(sec << 15));  in write_elapsed_second()
103 	rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));  in write_elapsed_second()
104 	rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));  in write_elapsed_second()
163 	rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));  in vr41xx_rtc_set_alarm()
164 	rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));  in vr41xx_rtc_set_alarm()
165 	rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));  in vr41xx_rtc_set_alarm()
233 	rtc1_write(RTCL1LREG, count);  in rtclong1_interrupt()
234 	rtc1_write(RTCL1HREG, count >> 16);  in rtclong1_interrupt()
293 	rtc1_write(ECMPLREG, 0);  in rtc_probe()
294 	rtc1_write(ECMPMREG, 0);  in rtc_probe()
295 	rtc1_write(ECMPHREG, 0);  in rtc_probe()
296 	rtc1_write(RTCL1LREG, 0);  in rtc_probe()
297 	rtc1_write(RTCL1HREG, 0);  in rtc_probe()