40 #define NCR5380_write(reg, value) \  macro
127 	NCR5380_write(TARGET_COMMAND_REG,  in g_NCR5380_trigger_irq()
129 	NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);  in g_NCR5380_trigger_irq()
130 	NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);  in g_NCR5380_trigger_irq()
131 	NCR5380_write(INITIATOR_COMMAND_REG,  in g_NCR5380_trigger_irq()
136 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);  in g_NCR5380_trigger_irq()
137 	NCR5380_write(SELECT_ENABLE_REG, 0);  in g_NCR5380_trigger_irq()
138 	NCR5380_write(TARGET_COMMAND_REG, 0);  in g_NCR5380_trigger_irq()
370 	NCR5380_write(MODE_REG, 0);  in generic_NCR5380_init_one()
385 		NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);  in generic_NCR5380_init_one()
506 	NCR5380_write(hostdata->c400_ctl_status, CSR_RESET);  in wait_for_53c80_access()
507 	NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);  in wait_for_53c80_access()
525 	NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR);  in generic_NCR5380_precv()
526 	NCR5380_write(hostdata->c400_blk_cnt, len / 128);  in generic_NCR5380_precv()
560 		NCR5380_write(hostdata->c400_ctl_status, CSR_RESET);  in generic_NCR5380_precv()
561 		NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);  in generic_NCR5380_precv()
592 	NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);  in generic_NCR5380_psend()
593 	NCR5380_write(hostdata->c400_blk_cnt, len / 128);  in generic_NCR5380_psend()
639 		NCR5380_write(hostdata->c400_ctl_status, CSR_RESET);  in generic_NCR5380_psend()
640 		NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);  in generic_NCR5380_psend()