2320 	ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);  in qla2100_pci_config()
2364 			if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)  in qla2300_pci_config()
2372 		RD_REG_WORD(&reg->ctrl_status);  in qla2300_pci_config()
2382 		RD_REG_WORD(&reg->ctrl_status);  in qla2300_pci_config()
2387 			if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)  in qla2300_pci_config()
2402 	ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);  in qla2300_pci_config()
2553 				if ((RD_REG_WORD(&reg->hccr) &  in qla2x00_reset_chip()
2559 			RD_REG_WORD(&reg->hccr);	/* PCI Posting. */  in qla2x00_reset_chip()
2565 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2569 		RD_REG_WORD(&reg->fpm_diag_config);	/* PCI Posting. */  in qla2x00_reset_chip()
2574 			RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */  in qla2x00_reset_chip()
2579 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2598 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2602 		RD_REG_WORD(&reg->hccr);		/* PCI Posting. */  in qla2x00_reset_chip()
2606 		RD_REG_WORD(&reg->hccr);		/* PCI Posting. */  in qla2x00_reset_chip()
2624 			if ((RD_REG_WORD(&reg->ctrl_status) &  in qla2x00_reset_chip()
2639 	RD_REG_WORD(&reg->hccr);			/* PCI Posting. */  in qla2x00_reset_chip()
2658 		RD_REG_WORD(&reg->hccr);		/* PCI Posting. */  in qla2x00_reset_chip()
2727 	RD_REG_WORD(&reg->mailbox0);  in qla24xx_reset_risc()
2728 	for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&  in qla24xx_reset_risc()
2789 	RD_REG_WORD(&reg->mailbox0);  in qla24xx_reset_risc()
2790 	for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&  in qla24xx_reset_risc()
2804 	     RD_REG_WORD(&reg->mailbox0));  in qla24xx_reset_risc()
2962 		data = RD_REG_WORD(&reg->ctrl_status);  in qla2x00_chip_diag()
3591 		RD_REG_WORD(&reg->hccr);  in qla2x00_setup_chip()
3689 		RD_REG_WORD(&reg->hccr);  in qla2x00_setup_chip()
3930 	RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg));		/* PCI Posting. */  in qla2x00_config_rings()
4485 		if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)  in qla2x00_nvram_config()
7000 	RD_REG_WORD(&reg->hccr);			/* PCI Posting. */  in qla2x00_reset_adapter()
7002 	RD_REG_WORD(&reg->hccr);			/* PCI Posting. */  in qla2x00_reset_adapter()