1338 	uint64_t off8, mem_crb, tmpw, word[2] = {0, 0};  in qla82xx_pci_mem_write_2M()  local
1344 		mem_crb = QLA82XX_CRB_QDR_NET;  in qla82xx_pci_mem_write_2M()
1346 		mem_crb = QLA82XX_CRB_DDR_NET;  in qla82xx_pci_mem_write_2M()
1398 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp);  in qla82xx_pci_mem_write_2M()
1400 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp);  in qla82xx_pci_mem_write_2M()
1402 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp);  in qla82xx_pci_mem_write_2M()
1404 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp);  in qla82xx_pci_mem_write_2M()
1406 		qla82xx_wr_32(ha, mem_crb +  in qla82xx_pci_mem_write_2M()
1409 		qla82xx_wr_32(ha, mem_crb +  in qla82xx_pci_mem_write_2M()
1413 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_write_2M()
1415 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_write_2M()
1418 			temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);  in qla82xx_pci_mem_write_2M()
1475 	uint64_t      off8, val, mem_crb, word[2] = {0, 0};  in qla82xx_pci_mem_read_2M()  local
1482 		mem_crb = QLA82XX_CRB_QDR_NET;  in qla82xx_pci_mem_read_2M()
1484 		mem_crb = QLA82XX_CRB_DDR_NET;  in qla82xx_pci_mem_read_2M()
1500 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp);  in qla82xx_pci_mem_read_2M()
1502 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp);  in qla82xx_pci_mem_read_2M()
1504 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_read_2M()
1506 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_read_2M()
1509 			temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);  in qla82xx_pci_mem_read_2M()
1525 					mem_crb + MIU_TEST_AGT_RDDATA(k));  in qla82xx_pci_mem_read_2M()