Lines Matching refs:RD_REG_WORD
29 data = RD_REG_WORD(®->nvram); in qla2x00_lock_nvram_access()
32 data = RD_REG_WORD(®->nvram); in qla2x00_lock_nvram_access()
37 RD_REG_WORD(®->u.isp2300.host_semaphore); in qla2x00_lock_nvram_access()
39 data = RD_REG_WORD(®->u.isp2300.host_semaphore); in qla2x00_lock_nvram_access()
44 RD_REG_WORD(®->u.isp2300.host_semaphore); in qla2x00_lock_nvram_access()
46 data = RD_REG_WORD(®->u.isp2300.host_semaphore); in qla2x00_lock_nvram_access()
62 RD_REG_WORD(®->u.isp2300.host_semaphore); in qla2x00_unlock_nvram_access()
77 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_nv_write()
81 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_nv_write()
84 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_nv_write()
124 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_nvram_request()
127 reg_data = RD_REG_WORD(®->nvram); in qla2x00_nvram_request()
131 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_nvram_request()
137 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_nvram_request()
175 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_nv_deselect()
220 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_write_nvram_word()
229 word = RD_REG_WORD(®->nvram); in qla2x00_write_nvram_word()
279 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_write_nvram_word_tmo()
282 word = RD_REG_WORD(®->nvram); in qla2x00_write_nvram_word_tmo()
351 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_clear_nvram_protection()
360 word = RD_REG_WORD(®->nvram); in qla2x00_clear_nvram_protection()
411 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_set_nvram_protection()
420 word = RD_REG_WORD(®->nvram); in qla2x00_set_nvram_protection()
1591 gpio_enable = RD_REG_WORD(®->gpioe); in qla2x00_beacon_blink()
1592 gpio_data = RD_REG_WORD(®->gpiod); in qla2x00_beacon_blink()
1602 RD_REG_WORD(®->gpioe); in qla2x00_beacon_blink()
1618 RD_REG_WORD(®->gpiod); in qla2x00_beacon_blink()
1648 gpio_enable = RD_REG_WORD(®->gpioe); in qla2x00_beacon_on()
1649 gpio_data = RD_REG_WORD(®->gpiod); in qla2x00_beacon_on()
1658 RD_REG_WORD(®->gpioe); in qla2x00_beacon_on()
1667 RD_REG_WORD(®->gpiod); in qla2x00_beacon_on()
1973 data = RD_REG_WORD(®->ctrl_status); in qla2x00_flash_enable()
1976 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ in qla2x00_flash_enable()
1989 data = RD_REG_WORD(®->ctrl_status); in qla2x00_flash_disable()
1992 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ in qla2x00_flash_disable()
2011 bank_select = RD_REG_WORD(®->ctrl_status); in qla2x00_read_flash_byte()
2020 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ in qla2x00_read_flash_byte()
2023 data = RD_REG_WORD(®->flash_data); in qla2x00_read_flash_byte()
2032 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ in qla2x00_read_flash_byte()
2037 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ in qla2x00_read_flash_byte()
2071 bank_select = RD_REG_WORD(®->ctrl_status); in qla2x00_write_flash_byte()
2079 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ in qla2x00_write_flash_byte()
2082 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ in qla2x00_write_flash_byte()
2084 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ in qla2x00_write_flash_byte()
2093 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ in qla2x00_write_flash_byte()
2098 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ in qla2x00_write_flash_byte()
2107 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ in qla2x00_write_flash_byte()
2109 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ in qla2x00_write_flash_byte()
2293 RD_REG_WORD(®->nvram); in qla2x00_read_flash_data()
2297 RD_REG_WORD(®->nvram); in qla2x00_read_flash_data()
2323 RD_REG_WORD(®->hccr); in qla2x00_suspend_hba()
2326 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) in qla2x00_suspend_hba()
2366 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_read_optrom_data()
2370 RD_REG_WORD(®->nvram); /* PCI Posting. */ in qla2x00_read_optrom_data()
2552 RD_REG_WORD(®->nvram); in qla2x00_write_optrom_data()