274 		reg_val = readw(&ha->reg->ctrl_status);  in qla4xxx_isp_check_reg()
4638 	uint32_t ctrl_status;  in qla4xxx_hw_reset()  local
4652 	ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4653 	if ((ctrl_status & CSR_SCSI_RESET_INTR) != 0)  in qla4xxx_hw_reset()
4654 		writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4657 	writel(set_rmask(CSR_SOFT_RESET), &ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4658 	readl(&ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4673 	uint32_t ctrl_status;  in qla4xxx_soft_reset()  local
4684 		ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4687 		if ((ctrl_status & CSR_NET_RESET_INTR) == 0)  in qla4xxx_soft_reset()
4693 	if ((ctrl_status & CSR_NET_RESET_INTR) != 0) {  in qla4xxx_soft_reset()
4699 		writel(set_rmask(CSR_NET_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4700 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4708 		ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4711 		if ((ctrl_status & CSR_SOFT_RESET) == 0) {  in qla4xxx_soft_reset()
4724 	ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4725 	if ((ctrl_status & CSR_SCSI_RESET_INTR) != 0) {  in qla4xxx_soft_reset()
4726 		writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4727 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4740 		writel(set_rmask(CSR_FORCE_SOFT_RESET), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4741 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4747 			ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4750 			if ((ctrl_status & CSR_FORCE_SOFT_RESET) == 0) {  in qla4xxx_soft_reset()
5377 			while ((readw(&ha->reg->ctrl_status) &  in qla4xxx_do_dpc()
5454 		       &ha->reg->ctrl_status);  in qla4xxx_free_adapter()
5455 		readl(&ha->reg->ctrl_status);  in qla4xxx_free_adapter()