Lines Matching refs:xqspi
150 static inline u32 zynq_qspi_read(struct zynq_qspi *xqspi, u32 offset) in zynq_qspi_read() argument
152 return readl_relaxed(xqspi->regs + offset); in zynq_qspi_read()
155 static inline void zynq_qspi_write(struct zynq_qspi *xqspi, u32 offset, in zynq_qspi_write() argument
158 writel_relaxed(val, xqspi->regs + offset); in zynq_qspi_write()
181 static void zynq_qspi_init_hw(struct zynq_qspi *xqspi) in zynq_qspi_init_hw() argument
185 zynq_qspi_write(xqspi, ZYNQ_QSPI_ENABLE_OFFSET, 0); in zynq_qspi_init_hw()
186 zynq_qspi_write(xqspi, ZYNQ_QSPI_IDIS_OFFSET, ZYNQ_QSPI_IXR_ALL_MASK); in zynq_qspi_init_hw()
189 zynq_qspi_write(xqspi, ZYNQ_QSPI_LINEAR_CFG_OFFSET, 0); in zynq_qspi_init_hw()
192 while (zynq_qspi_read(xqspi, ZYNQ_QSPI_STATUS_OFFSET) & in zynq_qspi_init_hw()
194 zynq_qspi_read(xqspi, ZYNQ_QSPI_RXD_OFFSET); in zynq_qspi_init_hw()
196 zynq_qspi_write(xqspi, ZYNQ_QSPI_STATUS_OFFSET, ZYNQ_QSPI_IXR_ALL_MASK); in zynq_qspi_init_hw()
197 config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET); in zynq_qspi_init_hw()
209 zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg); in zynq_qspi_init_hw()
211 zynq_qspi_write(xqspi, ZYNQ_QSPI_RX_THRESH_OFFSET, in zynq_qspi_init_hw()
213 zynq_qspi_write(xqspi, ZYNQ_QSPI_TX_THRESH_OFFSET, in zynq_qspi_init_hw()
216 zynq_qspi_write(xqspi, ZYNQ_QSPI_ENABLE_OFFSET, in zynq_qspi_init_hw()
240 static void zynq_qspi_rxfifo_op(struct zynq_qspi *xqspi, unsigned int size) in zynq_qspi_rxfifo_op() argument
244 data = zynq_qspi_read(xqspi, ZYNQ_QSPI_RXD_OFFSET); in zynq_qspi_rxfifo_op()
246 if (xqspi->rxbuf) { in zynq_qspi_rxfifo_op()
247 memcpy(xqspi->rxbuf, ((u8 *)&data) + 4 - size, size); in zynq_qspi_rxfifo_op()
248 xqspi->rxbuf += size; in zynq_qspi_rxfifo_op()
251 xqspi->rx_bytes -= size; in zynq_qspi_rxfifo_op()
252 if (xqspi->rx_bytes < 0) in zynq_qspi_rxfifo_op()
253 xqspi->rx_bytes = 0; in zynq_qspi_rxfifo_op()
261 static void zynq_qspi_txfifo_op(struct zynq_qspi *xqspi, unsigned int size) in zynq_qspi_txfifo_op() argument
268 if (xqspi->txbuf) { in zynq_qspi_txfifo_op()
270 memcpy(&data, xqspi->txbuf, size); in zynq_qspi_txfifo_op()
271 xqspi->txbuf += size; in zynq_qspi_txfifo_op()
276 xqspi->tx_bytes -= size; in zynq_qspi_txfifo_op()
277 zynq_qspi_write(xqspi, offset[size - 1], data); in zynq_qspi_txfifo_op()
288 struct zynq_qspi *xqspi = spi_controller_get_devdata(ctrl); in zynq_qspi_chipselect() local
291 config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET); in zynq_qspi_chipselect()
302 zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg); in zynq_qspi_chipselect()
322 static int zynq_qspi_config_op(struct zynq_qspi *xqspi, struct spi_device *spi) in zynq_qspi_config_op() argument
336 (clk_get_rate(xqspi->refclk) / (2 << baud_rate_val)) > in zynq_qspi_config_op()
340 config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET); in zynq_qspi_config_op()
352 zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg); in zynq_qspi_config_op()
388 static void zynq_qspi_write_op(struct zynq_qspi *xqspi, int txcount, in zynq_qspi_write_op() argument
393 len = xqspi->tx_bytes; in zynq_qspi_write_op()
400 zynq_qspi_txfifo_op(xqspi, len); in zynq_qspi_write_op()
409 if (xqspi->txbuf) { in zynq_qspi_write_op()
410 iowrite32_rep(xqspi->regs + ZYNQ_QSPI_TXD_00_00_OFFSET, in zynq_qspi_write_op()
411 xqspi->txbuf, count); in zynq_qspi_write_op()
412 xqspi->txbuf += count * 4; in zynq_qspi_write_op()
415 writel_relaxed(0, xqspi->regs + in zynq_qspi_write_op()
419 xqspi->tx_bytes -= count * 4; in zynq_qspi_write_op()
427 static void zynq_qspi_read_op(struct zynq_qspi *xqspi, int rxcount) in zynq_qspi_read_op() argument
431 len = xqspi->rx_bytes - xqspi->tx_bytes; in zynq_qspi_read_op()
435 if (xqspi->rxbuf) { in zynq_qspi_read_op()
436 ioread32_rep(xqspi->regs + ZYNQ_QSPI_RXD_OFFSET, in zynq_qspi_read_op()
437 xqspi->rxbuf, count); in zynq_qspi_read_op()
438 xqspi->rxbuf += count * 4; in zynq_qspi_read_op()
441 readl_relaxed(xqspi->regs + ZYNQ_QSPI_RXD_OFFSET); in zynq_qspi_read_op()
443 xqspi->rx_bytes -= count * 4; in zynq_qspi_read_op()
447 zynq_qspi_rxfifo_op(xqspi, len); in zynq_qspi_read_op()
465 struct zynq_qspi *xqspi = (struct zynq_qspi *)dev_id; in zynq_qspi_irq() local
467 intr_status = zynq_qspi_read(xqspi, ZYNQ_QSPI_STATUS_OFFSET); in zynq_qspi_irq()
468 zynq_qspi_write(xqspi, ZYNQ_QSPI_STATUS_OFFSET, intr_status); in zynq_qspi_irq()
479 zynq_qspi_read_op(xqspi, ZYNQ_QSPI_RX_THRESHOLD); in zynq_qspi_irq()
480 if (xqspi->tx_bytes) { in zynq_qspi_irq()
482 zynq_qspi_write_op(xqspi, ZYNQ_QSPI_RX_THRESHOLD, in zynq_qspi_irq()
489 if (!xqspi->rx_bytes) { in zynq_qspi_irq()
490 zynq_qspi_write(xqspi, in zynq_qspi_irq()
493 complete(&xqspi->data_completion); in zynq_qspi_irq()
516 struct zynq_qspi *xqspi = spi_controller_get_devdata(mem->spi->master); in zynq_qspi_exec_mem_op() local
520 dev_dbg(xqspi->dev, "cmd:%#x mode:%d.%d.%d.%d\n", in zynq_qspi_exec_mem_op()
525 zynq_qspi_config_op(xqspi, mem->spi); in zynq_qspi_exec_mem_op()
528 reinit_completion(&xqspi->data_completion); in zynq_qspi_exec_mem_op()
529 xqspi->txbuf = (u8 *)&op->cmd.opcode; in zynq_qspi_exec_mem_op()
530 xqspi->rxbuf = NULL; in zynq_qspi_exec_mem_op()
531 xqspi->tx_bytes = sizeof(op->cmd.opcode); in zynq_qspi_exec_mem_op()
532 xqspi->rx_bytes = sizeof(op->cmd.opcode); in zynq_qspi_exec_mem_op()
533 zynq_qspi_write_op(xqspi, ZYNQ_QSPI_FIFO_DEPTH, true); in zynq_qspi_exec_mem_op()
534 zynq_qspi_write(xqspi, ZYNQ_QSPI_IEN_OFFSET, in zynq_qspi_exec_mem_op()
536 if (!wait_for_completion_interruptible_timeout(&xqspi->data_completion, in zynq_qspi_exec_mem_op()
543 xqspi->txbuf[i] = op->addr.val >> in zynq_qspi_exec_mem_op()
547 reinit_completion(&xqspi->data_completion); in zynq_qspi_exec_mem_op()
548 xqspi->rxbuf = NULL; in zynq_qspi_exec_mem_op()
549 xqspi->tx_bytes = op->addr.nbytes; in zynq_qspi_exec_mem_op()
550 xqspi->rx_bytes = op->addr.nbytes; in zynq_qspi_exec_mem_op()
551 zynq_qspi_write_op(xqspi, ZYNQ_QSPI_FIFO_DEPTH, true); in zynq_qspi_exec_mem_op()
552 zynq_qspi_write(xqspi, ZYNQ_QSPI_IEN_OFFSET, in zynq_qspi_exec_mem_op()
554 if (!wait_for_completion_interruptible_timeout(&xqspi->data_completion, in zynq_qspi_exec_mem_op()
562 reinit_completion(&xqspi->data_completion); in zynq_qspi_exec_mem_op()
563 xqspi->txbuf = tmpbuf; in zynq_qspi_exec_mem_op()
564 xqspi->rxbuf = NULL; in zynq_qspi_exec_mem_op()
565 xqspi->tx_bytes = op->dummy.nbytes; in zynq_qspi_exec_mem_op()
566 xqspi->rx_bytes = op->dummy.nbytes; in zynq_qspi_exec_mem_op()
567 zynq_qspi_write_op(xqspi, ZYNQ_QSPI_FIFO_DEPTH, true); in zynq_qspi_exec_mem_op()
568 zynq_qspi_write(xqspi, ZYNQ_QSPI_IEN_OFFSET, in zynq_qspi_exec_mem_op()
570 if (!wait_for_completion_interruptible_timeout(&xqspi->data_completion, in zynq_qspi_exec_mem_op()
578 reinit_completion(&xqspi->data_completion); in zynq_qspi_exec_mem_op()
580 xqspi->txbuf = (u8 *)op->data.buf.out; in zynq_qspi_exec_mem_op()
581 xqspi->tx_bytes = op->data.nbytes; in zynq_qspi_exec_mem_op()
582 xqspi->rxbuf = NULL; in zynq_qspi_exec_mem_op()
583 xqspi->rx_bytes = op->data.nbytes; in zynq_qspi_exec_mem_op()
585 xqspi->txbuf = NULL; in zynq_qspi_exec_mem_op()
586 xqspi->rxbuf = (u8 *)op->data.buf.in; in zynq_qspi_exec_mem_op()
587 xqspi->rx_bytes = op->data.nbytes; in zynq_qspi_exec_mem_op()
588 xqspi->tx_bytes = op->data.nbytes; in zynq_qspi_exec_mem_op()
591 zynq_qspi_write_op(xqspi, ZYNQ_QSPI_FIFO_DEPTH, true); in zynq_qspi_exec_mem_op()
592 zynq_qspi_write(xqspi, ZYNQ_QSPI_IEN_OFFSET, in zynq_qspi_exec_mem_op()
594 if (!wait_for_completion_interruptible_timeout(&xqspi->data_completion, in zynq_qspi_exec_mem_op()
622 struct zynq_qspi *xqspi; in zynq_qspi_probe() local
625 ctlr = spi_alloc_master(&pdev->dev, sizeof(*xqspi)); in zynq_qspi_probe()
629 xqspi = spi_controller_get_devdata(ctlr); in zynq_qspi_probe()
630 xqspi->dev = dev; in zynq_qspi_probe()
631 platform_set_drvdata(pdev, xqspi); in zynq_qspi_probe()
632 xqspi->regs = devm_platform_ioremap_resource(pdev, 0); in zynq_qspi_probe()
633 if (IS_ERR(xqspi->regs)) { in zynq_qspi_probe()
634 ret = PTR_ERR(xqspi->regs); in zynq_qspi_probe()
638 xqspi->pclk = devm_clk_get(&pdev->dev, "pclk"); in zynq_qspi_probe()
639 if (IS_ERR(xqspi->pclk)) { in zynq_qspi_probe()
641 ret = PTR_ERR(xqspi->pclk); in zynq_qspi_probe()
645 init_completion(&xqspi->data_completion); in zynq_qspi_probe()
647 xqspi->refclk = devm_clk_get(&pdev->dev, "ref_clk"); in zynq_qspi_probe()
648 if (IS_ERR(xqspi->refclk)) { in zynq_qspi_probe()
650 ret = PTR_ERR(xqspi->refclk); in zynq_qspi_probe()
654 ret = clk_prepare_enable(xqspi->pclk); in zynq_qspi_probe()
660 ret = clk_prepare_enable(xqspi->refclk); in zynq_qspi_probe()
667 zynq_qspi_init_hw(xqspi); in zynq_qspi_probe()
669 xqspi->irq = platform_get_irq(pdev, 0); in zynq_qspi_probe()
670 if (xqspi->irq <= 0) { in zynq_qspi_probe()
674 ret = devm_request_irq(&pdev->dev, xqspi->irq, zynq_qspi_irq, in zynq_qspi_probe()
675 0, pdev->name, xqspi); in zynq_qspi_probe()
693 ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2; in zynq_qspi_probe()
704 clk_disable_unprepare(xqspi->refclk); in zynq_qspi_probe()
706 clk_disable_unprepare(xqspi->pclk); in zynq_qspi_probe()
725 struct zynq_qspi *xqspi = platform_get_drvdata(pdev); in zynq_qspi_remove() local
727 zynq_qspi_write(xqspi, ZYNQ_QSPI_ENABLE_OFFSET, 0); in zynq_qspi_remove()
729 clk_disable_unprepare(xqspi->refclk); in zynq_qspi_remove()
730 clk_disable_unprepare(xqspi->pclk); in zynq_qspi_remove()