Lines Matching refs:vconfig
91 u8 *vconfig; member
114 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_VENDOR_ID], in mdpy_create_config_space()
116 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_DEVICE_ID], in mdpy_create_config_space()
118 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_VENDOR_ID], in mdpy_create_config_space()
120 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_ID], in mdpy_create_config_space()
123 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_COMMAND], in mdpy_create_config_space()
125 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_STATUS], in mdpy_create_config_space()
127 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_CLASS_DEVICE], in mdpy_create_config_space()
129 mdev_state->vconfig[PCI_CLASS_REVISION] = 0x01; in mdpy_create_config_space()
131 STORE_LE32((u32 *) &mdev_state->vconfig[PCI_BASE_ADDRESS_0], in mdpy_create_config_space()
138 mdev_state->vconfig[PCI_CAPABILITY_LIST] = MDPY_VENDORCAP_OFFSET; in mdpy_create_config_space()
139 mdev_state->vconfig[MDPY_VENDORCAP_OFFSET + 0] = 0x09; /* vendor cap */ in mdpy_create_config_space()
140 mdev_state->vconfig[MDPY_VENDORCAP_OFFSET + 1] = 0x00; /* next ptr */ in mdpy_create_config_space()
141 mdev_state->vconfig[MDPY_VENDORCAP_OFFSET + 2] = MDPY_VENDORCAP_SIZE; in mdpy_create_config_space()
142 STORE_LE32((u32 *) &mdev_state->vconfig[MDPY_FORMAT_OFFSET], in mdpy_create_config_space()
144 STORE_LE32((u32 *) &mdev_state->vconfig[MDPY_WIDTH_OFFSET], in mdpy_create_config_space()
146 STORE_LE32((u32 *) &mdev_state->vconfig[MDPY_HEIGHT_OFFSET], in mdpy_create_config_space()
168 cfg_addr |= (mdev_state->vconfig[offset] & in handle_pci_cfg_write()
170 STORE_LE32(&mdev_state->vconfig[offset], cfg_addr); in handle_pci_cfg_write()
188 memcpy(buf, (mdev_state->vconfig + pos), count); in mdev_access()
243 mdev_state->vconfig = kzalloc(MDPY_CONFIG_SPACE_SIZE, GFP_KERNEL); in mdpy_create()
244 if (mdev_state->vconfig == NULL) { in mdpy_create()
255 kfree(mdev_state->vconfig); in mdpy_create()
284 kfree(mdev_state->vconfig); in mdpy_remove()