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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Derived from include/asm-x86/mach-summit/mach_mpparse.h
4  *          and include/asm-x86/mach-default/bios_ebda.h
5  *
6  * Author: Laurent Vivier <Laurent.Vivier@bull.net>
7  */
8 
9 #ifndef _ASM_X86_RIO_H
10 #define _ASM_X86_RIO_H
11 
12 #define RIO_TABLE_VERSION	3
13 
14 struct rio_table_hdr {
15 	u8 version;		/* Version number of this data structure  */
16 	u8 num_scal_dev;	/* # of Scalability devices               */
17 	u8 num_rio_dev;		/* # of RIO I/O devices                   */
18 } __attribute__((packed));
19 
20 struct scal_detail {
21 	u8 node_id;		/* Scalability Node ID                    */
22 	u32 CBAR;		/* Address of 1MB register space          */
23 	u8 port0node;		/* Node ID port connected to: 0xFF=None   */
24 	u8 port0port;		/* Port num port connected to: 0,1,2, or  */
25 				/* 0xFF=None                              */
26 	u8 port1node;		/* Node ID port connected to: 0xFF = None */
27 	u8 port1port;		/* Port num port connected to: 0,1,2, or  */
28 				/* 0xFF=None                              */
29 	u8 port2node;		/* Node ID port connected to: 0xFF = None */
30 	u8 port2port;		/* Port num port connected to: 0,1,2, or  */
31 				/* 0xFF=None                              */
32 	u8 chassis_num;		/* 1 based Chassis number (1 = boot node) */
33 } __attribute__((packed));
34 
35 struct rio_detail {
36 	u8 node_id;		/* RIO Node ID                            */
37 	u32 BBAR;		/* Address of 1MB register space          */
38 	u8 type;		/* Type of device                         */
39 	u8 owner_id;		/* Node ID of Hurricane that owns this    */
40 				/* node                                   */
41 	u8 port0node;		/* Node ID port connected to: 0xFF=None   */
42 	u8 port0port;		/* Port num port connected to: 0,1,2, or  */
43 				/* 0xFF=None                              */
44 	u8 port1node;		/* Node ID port connected to: 0xFF=None   */
45 	u8 port1port;		/* Port num port connected to: 0,1,2, or  */
46 				/* 0xFF=None                              */
47 	u8 first_slot;		/* Lowest slot number below this Calgary  */
48 	u8 status;		/* Bit 0 = 1 : the XAPIC is used          */
49 				/*       = 0 : the XAPIC is not used, ie: */
50 				/*            ints fwded to another XAPIC */
51 				/*           Bits1:7 Reserved             */
52 	u8 WP_index;		/* instance index - lower ones have       */
53 				/*     lower slot numbers/PCI bus numbers */
54 	u8 chassis_num;		/* 1 based Chassis number                 */
55 } __attribute__((packed));
56 
57 enum {
58 	HURR_SCALABILTY	= 0,	/* Hurricane Scalability info */
59 	HURR_RIOIB	= 2,	/* Hurricane RIOIB info       */
60 	COMPAT_CALGARY	= 4,	/* Compatibility Calgary      */
61 	ALT_CALGARY	= 5,	/* Second Planar Calgary      */
62 };
63 
64 #endif /* _ASM_X86_RIO_H */
65