1# SPDX-License-Identifier: GPL-2.0-only 2if ARCH_TEGRA 3 4# 32-bit ARM SoCs 5if ARM 6 7config ARCH_TEGRA_2x_SOC 8 bool "Enable support for Tegra20 family" 9 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 10 select ARM_ERRATA_720789 11 select ARM_ERRATA_754327 if SMP 12 select ARM_ERRATA_764369 if SMP 13 select PINCTRL_TEGRA20 14 select PL310_ERRATA_727915 if CACHE_L2X0 15 select PL310_ERRATA_769419 if CACHE_L2X0 16 select SOC_TEGRA_FLOWCTRL 17 select SOC_TEGRA_PMC 18 select TEGRA_TIMER 19 help 20 Support for NVIDIA Tegra AP20 and T20 processors, based on the 21 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 22 23config ARCH_TEGRA_3x_SOC 24 bool "Enable support for Tegra30 family" 25 select ARM_ERRATA_754322 26 select ARM_ERRATA_764369 if SMP 27 select PINCTRL_TEGRA30 28 select PL310_ERRATA_769419 if CACHE_L2X0 29 select SOC_TEGRA_FLOWCTRL 30 select SOC_TEGRA_PMC 31 select TEGRA_TIMER 32 help 33 Support for NVIDIA Tegra T30 processor family, based on the 34 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 35 36config ARCH_TEGRA_114_SOC 37 bool "Enable support for Tegra114 family" 38 select ARM_ERRATA_798181 if SMP 39 select HAVE_ARM_ARCH_TIMER 40 select PINCTRL_TEGRA114 41 select SOC_TEGRA_FLOWCTRL 42 select SOC_TEGRA_PMC 43 select TEGRA_TIMER 44 help 45 Support for NVIDIA Tegra T114 processor family, based on the 46 ARM CortexA15MP CPU 47 48config ARCH_TEGRA_124_SOC 49 bool "Enable support for Tegra124 family" 50 select HAVE_ARM_ARCH_TIMER 51 select PINCTRL_TEGRA124 52 select SOC_TEGRA_FLOWCTRL 53 select SOC_TEGRA_PMC 54 select TEGRA_TIMER 55 help 56 Support for NVIDIA Tegra T124 processor family, based on the 57 ARM CortexA15MP CPU 58 59endif 60 61# 64-bit ARM SoCs 62if ARM64 63 64config ARCH_TEGRA_132_SOC 65 bool "NVIDIA Tegra132 SoC" 66 select PINCTRL_TEGRA124 67 select SOC_TEGRA_FLOWCTRL 68 select SOC_TEGRA_PMC 69 help 70 Enable support for NVIDIA Tegra132 SoC, based on the Denver 71 ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC, 72 but contains an NVIDIA Denver CPU complex in place of 73 Tegra124's "4+1" Cortex-A15 CPU complex. 74 75config ARCH_TEGRA_210_SOC 76 bool "NVIDIA Tegra210 SoC" 77 select PINCTRL_TEGRA210 78 select SOC_TEGRA_FLOWCTRL 79 select SOC_TEGRA_PMC 80 select TEGRA_TIMER 81 depends on !LTO_CLANG 82 help 83 Enable support for the NVIDIA Tegra210 SoC. Also known as Tegra X1, 84 the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53 85 cores in a switched configuration. It features a GPU of the Maxwell 86 architecture with support for DX11, SM4, OpenGL 4.5, OpenGL ES 3.1 87 and providing 256 CUDA cores. It supports hardware-accelerated en- 88 and decoding of various video standards including H.265, H.264 and 89 VP8 at 4K resolution and up to 60 fps. 90 91 Besides the multimedia features it also comes with a variety of I/O 92 controllers, such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to 93 name only a few. 94 95config ARCH_TEGRA_186_SOC 96 bool "NVIDIA Tegra186 SoC" 97 select MAILBOX 98 select TEGRA_BPMP 99 select TEGRA_HSP_MBOX 100 select TEGRA_IVC 101 select SOC_TEGRA_PMC 102 help 103 Enable support for the NVIDIA Tegar186 SoC. The Tegra186 features a 104 combination of Denver and Cortex-A57 CPU cores and a GPU based on 105 the Pascal architecture. It contains an ADSP with a Cortex-A9 CPU 106 used for audio processing, hardware video encoders/decoders with 107 multi-format support, ISP for image capture processing and BPMP for 108 power management. 109 110config ARCH_TEGRA_194_SOC 111 bool "NVIDIA Tegra194 SoC" 112 select MAILBOX 113 select PINCTRL_TEGRA194 114 select TEGRA_BPMP 115 select TEGRA_HSP_MBOX 116 select TEGRA_IVC 117 select SOC_TEGRA_PMC 118 help 119 Enable support for the NVIDIA Tegra194 SoC. 120 121endif 122endif 123 124config SOC_TEGRA_FUSE 125 def_bool y 126 depends on ARCH_TEGRA 127 select SOC_BUS 128 129config SOC_TEGRA_FLOWCTRL 130 bool 131 132config SOC_TEGRA_PMC 133 bool 134 135config SOC_TEGRA_POWERGATE_BPMP 136 def_bool y 137 depends on PM_GENERIC_DOMAINS 138 depends on TEGRA_BPMP 139