1# SPDX-License-Identifier: GPL-2.0-only 2 3menuconfig CRYPTO_HW 4 bool "Hardware crypto devices" 5 default y 6 ---help--- 7 Say Y here to get to see options for hardware crypto devices and 8 processors. This option alone does not add any kernel code. 9 10 If you say N, all options in this submenu will be skipped and disabled. 11 12if CRYPTO_HW 13 14config CRYPTO_DEV_PADLOCK 15 tristate "Support for VIA PadLock ACE" 16 depends on X86 && !UML 17 help 18 Some VIA processors come with an integrated crypto engine 19 (so called VIA PadLock ACE, Advanced Cryptography Engine) 20 that provides instructions for very fast cryptographic 21 operations with supported algorithms. 22 23 The instructions are used only when the CPU supports them. 24 Otherwise software encryption is used. 25 26config CRYPTO_DEV_PADLOCK_AES 27 tristate "PadLock driver for AES algorithm" 28 depends on CRYPTO_DEV_PADLOCK 29 select CRYPTO_BLKCIPHER 30 select CRYPTO_LIB_AES 31 help 32 Use VIA PadLock for AES algorithm. 33 34 Available in VIA C3 and newer CPUs. 35 36 If unsure say M. The compiled module will be 37 called padlock-aes. 38 39config CRYPTO_DEV_PADLOCK_SHA 40 tristate "PadLock driver for SHA1 and SHA256 algorithms" 41 depends on CRYPTO_DEV_PADLOCK 42 select CRYPTO_HASH 43 select CRYPTO_SHA1 44 select CRYPTO_SHA256 45 help 46 Use VIA PadLock for SHA1/SHA256 algorithms. 47 48 Available in VIA C7 and newer processors. 49 50 If unsure say M. The compiled module will be 51 called padlock-sha. 52 53config CRYPTO_DEV_GEODE 54 tristate "Support for the Geode LX AES engine" 55 depends on X86_32 && PCI 56 select CRYPTO_ALGAPI 57 select CRYPTO_BLKCIPHER 58 help 59 Say 'Y' here to use the AMD Geode LX processor on-board AES 60 engine for the CryptoAPI AES algorithm. 61 62 To compile this driver as a module, choose M here: the module 63 will be called geode-aes. 64 65config ZCRYPT 66 tristate "Support for s390 cryptographic adapters" 67 depends on S390 68 select HW_RANDOM 69 help 70 Select this option if you want to enable support for 71 s390 cryptographic adapters like: 72 + PCI-X Cryptographic Coprocessor (PCIXCC) 73 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC) 74 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA) 75 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP) 76 77config ZCRYPT_MULTIDEVNODES 78 bool "Support for multiple zcrypt device nodes" 79 default y 80 depends on S390 81 depends on ZCRYPT 82 help 83 With this option enabled the zcrypt device driver can 84 provide multiple devices nodes in /dev. Each device 85 node can get customized to limit access and narrow 86 down the use of the available crypto hardware. 87 88config PKEY 89 tristate "Kernel API for protected key handling" 90 depends on S390 91 depends on ZCRYPT 92 help 93 With this option enabled the pkey kernel module provides an API 94 for creation and handling of protected keys. Other parts of the 95 kernel or userspace applications may use these functions. 96 97 Select this option if you want to enable the kernel and userspace 98 API for proteced key handling. 99 100 Please note that creation of protected keys from secure keys 101 requires to have at least one CEX card in coprocessor mode 102 available at runtime. 103 104config CRYPTO_PAES_S390 105 tristate "PAES cipher algorithms" 106 depends on S390 107 depends on ZCRYPT 108 depends on PKEY 109 select CRYPTO_ALGAPI 110 select CRYPTO_BLKCIPHER 111 help 112 This is the s390 hardware accelerated implementation of the 113 AES cipher algorithms for use with protected key. 114 115 Select this option if you want to use the paes cipher 116 for example to use protected key encrypted devices. 117 118config CRYPTO_SHA1_S390 119 tristate "SHA1 digest algorithm" 120 depends on S390 121 select CRYPTO_HASH 122 help 123 This is the s390 hardware accelerated implementation of the 124 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). 125 126 It is available as of z990. 127 128config CRYPTO_SHA256_S390 129 tristate "SHA256 digest algorithm" 130 depends on S390 131 select CRYPTO_HASH 132 help 133 This is the s390 hardware accelerated implementation of the 134 SHA256 secure hash standard (DFIPS 180-2). 135 136 It is available as of z9. 137 138config CRYPTO_SHA512_S390 139 tristate "SHA384 and SHA512 digest algorithm" 140 depends on S390 141 select CRYPTO_HASH 142 help 143 This is the s390 hardware accelerated implementation of the 144 SHA512 secure hash standard. 145 146 It is available as of z10. 147 148config CRYPTO_SHA3_256_S390 149 tristate "SHA3_224 and SHA3_256 digest algorithm" 150 depends on S390 151 select CRYPTO_HASH 152 help 153 This is the s390 hardware accelerated implementation of the 154 SHA3_256 secure hash standard. 155 156 It is available as of z14. 157 158config CRYPTO_SHA3_512_S390 159 tristate "SHA3_384 and SHA3_512 digest algorithm" 160 depends on S390 161 select CRYPTO_HASH 162 help 163 This is the s390 hardware accelerated implementation of the 164 SHA3_512 secure hash standard. 165 166 It is available as of z14. 167 168config CRYPTO_DES_S390 169 tristate "DES and Triple DES cipher algorithms" 170 depends on S390 171 select CRYPTO_ALGAPI 172 select CRYPTO_BLKCIPHER 173 select CRYPTO_LIB_DES 174 help 175 This is the s390 hardware accelerated implementation of the 176 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). 177 178 As of z990 the ECB and CBC mode are hardware accelerated. 179 As of z196 the CTR mode is hardware accelerated. 180 181config CRYPTO_AES_S390 182 tristate "AES cipher algorithms" 183 depends on S390 184 select CRYPTO_ALGAPI 185 select CRYPTO_BLKCIPHER 186 help 187 This is the s390 hardware accelerated implementation of the 188 AES cipher algorithms (FIPS-197). 189 190 As of z9 the ECB and CBC modes are hardware accelerated 191 for 128 bit keys. 192 As of z10 the ECB and CBC modes are hardware accelerated 193 for all AES key sizes. 194 As of z196 the CTR mode is hardware accelerated for all AES 195 key sizes and XTS mode is hardware accelerated for 256 and 196 512 bit keys. 197 198config S390_PRNG 199 tristate "Pseudo random number generator device driver" 200 depends on S390 201 default "m" 202 help 203 Select this option if you want to use the s390 pseudo random number 204 generator. The PRNG is part of the cryptographic processor functions 205 and uses triple-DES to generate secure random numbers like the 206 ANSI X9.17 standard. User-space programs access the 207 pseudo-random-number device through the char device /dev/prandom. 208 209 It is available as of z9. 210 211config CRYPTO_GHASH_S390 212 tristate "GHASH hash function" 213 depends on S390 214 select CRYPTO_HASH 215 help 216 This is the s390 hardware accelerated implementation of GHASH, 217 the hash function used in GCM (Galois/Counter mode). 218 219 It is available as of z196. 220 221config CRYPTO_CRC32_S390 222 tristate "CRC-32 algorithms" 223 depends on S390 224 select CRYPTO_HASH 225 select CRC32 226 help 227 Select this option if you want to use hardware accelerated 228 implementations of CRC algorithms. With this option, you 229 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet) 230 and CRC-32C (Castagnoli). 231 232 It is available with IBM z13 or later. 233 234config CRYPTO_DEV_MARVELL_CESA 235 tristate "Marvell's Cryptographic Engine driver" 236 depends on PLAT_ORION || ARCH_MVEBU 237 select CRYPTO_LIB_AES 238 select CRYPTO_LIB_DES 239 select CRYPTO_BLKCIPHER 240 select CRYPTO_HASH 241 select SRAM 242 help 243 This driver allows you to utilize the Cryptographic Engines and 244 Security Accelerator (CESA) which can be found on MVEBU and ORION 245 platforms. 246 This driver supports CPU offload through DMA transfers. 247 248config CRYPTO_DEV_NIAGARA2 249 tristate "Niagara2 Stream Processing Unit driver" 250 select CRYPTO_LIB_DES 251 select CRYPTO_BLKCIPHER 252 select CRYPTO_HASH 253 select CRYPTO_MD5 254 select CRYPTO_SHA1 255 select CRYPTO_SHA256 256 depends on SPARC64 257 help 258 Each core of a Niagara2 processor contains a Stream 259 Processing Unit, which itself contains several cryptographic 260 sub-units. One set provides the Modular Arithmetic Unit, 261 used for SSL offload. The other set provides the Cipher 262 Group, which can perform encryption, decryption, hashing, 263 checksumming, and raw copies. 264 265config CRYPTO_DEV_HIFN_795X 266 tristate "Driver HIFN 795x crypto accelerator chips" 267 select CRYPTO_LIB_DES 268 select CRYPTO_BLKCIPHER 269 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG 270 depends on PCI 271 depends on !ARCH_DMA_ADDR_T_64BIT 272 help 273 This option allows you to have support for HIFN 795x crypto adapters. 274 275config CRYPTO_DEV_HIFN_795X_RNG 276 bool "HIFN 795x random number generator" 277 depends on CRYPTO_DEV_HIFN_795X 278 help 279 Select this option if you want to enable the random number generator 280 on the HIFN 795x crypto adapters. 281 282source "drivers/crypto/caam/Kconfig" 283 284config CRYPTO_DEV_TALITOS 285 tristate "Talitos Freescale Security Engine (SEC)" 286 select CRYPTO_AEAD 287 select CRYPTO_AUTHENC 288 select CRYPTO_BLKCIPHER 289 select CRYPTO_HASH 290 select CRYPTO_LIB_DES 291 select HW_RANDOM 292 depends on FSL_SOC 293 help 294 Say 'Y' here to use the Freescale Security Engine (SEC) 295 to offload cryptographic algorithm computation. 296 297 The Freescale SEC is present on PowerQUICC 'E' processors, such 298 as the MPC8349E and MPC8548E. 299 300 To compile this driver as a module, choose M here: the module 301 will be called talitos. 302 303config CRYPTO_DEV_TALITOS1 304 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" 305 depends on CRYPTO_DEV_TALITOS 306 depends on PPC_8xx || PPC_82xx 307 default y 308 help 309 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 310 found on MPC82xx or the Freescale Security Engine (SEC Lite) 311 version 1.2 found on MPC8xx 312 313config CRYPTO_DEV_TALITOS2 314 bool "SEC2+ (SEC version 2.0 or upper)" 315 depends on CRYPTO_DEV_TALITOS 316 default y if !PPC_8xx 317 help 318 Say 'Y' here to use the Freescale Security Engine (SEC) 319 version 2 and following as found on MPC83xx, MPC85xx, etc ... 320 321config CRYPTO_DEV_IXP4XX 322 tristate "Driver for IXP4xx crypto hardware acceleration" 323 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE 324 select CRYPTO_LIB_DES 325 select CRYPTO_AEAD 326 select CRYPTO_AUTHENC 327 select CRYPTO_BLKCIPHER 328 help 329 Driver for the IXP4xx NPE crypto engine. 330 331config CRYPTO_DEV_PPC4XX 332 tristate "Driver AMCC PPC4xx crypto accelerator" 333 depends on PPC && 4xx 334 select CRYPTO_HASH 335 select CRYPTO_AEAD 336 select CRYPTO_AES 337 select CRYPTO_LIB_AES 338 select CRYPTO_CCM 339 select CRYPTO_CTR 340 select CRYPTO_GCM 341 select CRYPTO_BLKCIPHER 342 help 343 This option allows you to have support for AMCC crypto acceleration. 344 345config HW_RANDOM_PPC4XX 346 bool "PowerPC 4xx generic true random number generator support" 347 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM 348 default y 349 ---help--- 350 This option provides the kernel-side support for the TRNG hardware 351 found in the security function of some PowerPC 4xx SoCs. 352 353config CRYPTO_DEV_OMAP 354 tristate "Support for OMAP crypto HW accelerators" 355 depends on ARCH_OMAP2PLUS 356 help 357 OMAP processors have various crypto HW accelerators. Select this if 358 you want to use the OMAP modules for any of the crypto algorithms. 359 360if CRYPTO_DEV_OMAP 361 362config CRYPTO_DEV_OMAP_SHAM 363 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" 364 depends on ARCH_OMAP2PLUS 365 select CRYPTO_SHA1 366 select CRYPTO_MD5 367 select CRYPTO_SHA256 368 select CRYPTO_SHA512 369 select CRYPTO_HMAC 370 help 371 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you 372 want to use the OMAP module for MD5/SHA1/SHA2 algorithms. 373 374config CRYPTO_DEV_OMAP_AES 375 tristate "Support for OMAP AES hw engine" 376 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS 377 select CRYPTO_AES 378 select CRYPTO_BLKCIPHER 379 select CRYPTO_ENGINE 380 select CRYPTO_CBC 381 select CRYPTO_ECB 382 select CRYPTO_CTR 383 select CRYPTO_AEAD 384 help 385 OMAP processors have AES module accelerator. Select this if you 386 want to use the OMAP module for AES algorithms. 387 388config CRYPTO_DEV_OMAP_DES 389 tristate "Support for OMAP DES/3DES hw engine" 390 depends on ARCH_OMAP2PLUS 391 select CRYPTO_LIB_DES 392 select CRYPTO_BLKCIPHER 393 select CRYPTO_ENGINE 394 help 395 OMAP processors have DES/3DES module accelerator. Select this if you 396 want to use the OMAP module for DES and 3DES algorithms. Currently 397 the ECB and CBC modes of operation are supported by the driver. Also 398 accesses made on unaligned boundaries are supported. 399 400endif # CRYPTO_DEV_OMAP 401 402config CRYPTO_DEV_PICOXCELL 403 tristate "Support for picoXcell IPSEC and Layer2 crypto engines" 404 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK 405 select CRYPTO_AEAD 406 select CRYPTO_AES 407 select CRYPTO_AUTHENC 408 select CRYPTO_BLKCIPHER 409 select CRYPTO_LIB_DES 410 select CRYPTO_CBC 411 select CRYPTO_ECB 412 select CRYPTO_SEQIV 413 help 414 This option enables support for the hardware offload engines in the 415 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload 416 and for 3gpp Layer 2 ciphering support. 417 418 Saying m here will build a module named picoxcell_crypto. 419 420config CRYPTO_DEV_SAHARA 421 tristate "Support for SAHARA crypto accelerator" 422 depends on ARCH_MXC && OF 423 select CRYPTO_BLKCIPHER 424 select CRYPTO_AES 425 select CRYPTO_ECB 426 help 427 This option enables support for the SAHARA HW crypto accelerator 428 found in some Freescale i.MX chips. 429 430config CRYPTO_DEV_EXYNOS_RNG 431 tristate "EXYNOS HW pseudo random number generator support" 432 depends on ARCH_EXYNOS || COMPILE_TEST 433 depends on HAS_IOMEM 434 select CRYPTO_RNG 435 ---help--- 436 This driver provides kernel-side support through the 437 cryptographic API for the pseudo random number generator hardware 438 found on Exynos SoCs. 439 440 To compile this driver as a module, choose M here: the 441 module will be called exynos-rng. 442 443 If unsure, say Y. 444 445config CRYPTO_DEV_S5P 446 tristate "Support for Samsung S5PV210/Exynos crypto accelerator" 447 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST 448 depends on HAS_IOMEM 449 select CRYPTO_AES 450 select CRYPTO_BLKCIPHER 451 help 452 This option allows you to have support for S5P crypto acceleration. 453 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES 454 algorithms execution. 455 456config CRYPTO_DEV_EXYNOS_HASH 457 bool "Support for Samsung Exynos HASH accelerator" 458 depends on CRYPTO_DEV_S5P 459 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m 460 select CRYPTO_SHA1 461 select CRYPTO_MD5 462 select CRYPTO_SHA256 463 help 464 Select this to offload Exynos from HASH MD5/SHA1/SHA256. 465 This will select software SHA1, MD5 and SHA256 as they are 466 needed for small and zero-size messages. 467 HASH algorithms will be disabled if EXYNOS_RNG 468 is enabled due to hw conflict. 469 470config CRYPTO_DEV_NX 471 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" 472 depends on PPC64 473 help 474 This enables support for the NX hardware cryptographic accelerator 475 coprocessor that is in IBM PowerPC P7+ or later processors. This 476 does not actually enable any drivers, it only allows you to select 477 which acceleration type (encryption and/or compression) to enable. 478 479if CRYPTO_DEV_NX 480 source "drivers/crypto/nx/Kconfig" 481endif 482 483config CRYPTO_DEV_UX500 484 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration" 485 depends on ARCH_U8500 486 help 487 Driver for ST-Ericsson UX500 crypto engine. 488 489if CRYPTO_DEV_UX500 490 source "drivers/crypto/ux500/Kconfig" 491endif # if CRYPTO_DEV_UX500 492 493config CRYPTO_DEV_ATMEL_AUTHENC 494 tristate "Support for Atmel IPSEC/SSL hw accelerator" 495 depends on ARCH_AT91 || COMPILE_TEST 496 select CRYPTO_AUTHENC 497 select CRYPTO_DEV_ATMEL_AES 498 select CRYPTO_DEV_ATMEL_SHA 499 help 500 Some Atmel processors can combine the AES and SHA hw accelerators 501 to enhance support of IPSEC/SSL. 502 Select this if you want to use the Atmel modules for 503 authenc(hmac(shaX),Y(cbc)) algorithms. 504 505config CRYPTO_DEV_ATMEL_AES 506 tristate "Support for Atmel AES hw accelerator" 507 depends on ARCH_AT91 || COMPILE_TEST 508 select CRYPTO_AES 509 select CRYPTO_AEAD 510 select CRYPTO_BLKCIPHER 511 help 512 Some Atmel processors have AES hw accelerator. 513 Select this if you want to use the Atmel module for 514 AES algorithms. 515 516 To compile this driver as a module, choose M here: the module 517 will be called atmel-aes. 518 519config CRYPTO_DEV_ATMEL_TDES 520 tristate "Support for Atmel DES/TDES hw accelerator" 521 depends on ARCH_AT91 || COMPILE_TEST 522 select CRYPTO_LIB_DES 523 select CRYPTO_BLKCIPHER 524 help 525 Some Atmel processors have DES/TDES hw accelerator. 526 Select this if you want to use the Atmel module for 527 DES/TDES algorithms. 528 529 To compile this driver as a module, choose M here: the module 530 will be called atmel-tdes. 531 532config CRYPTO_DEV_ATMEL_SHA 533 tristate "Support for Atmel SHA hw accelerator" 534 depends on ARCH_AT91 || COMPILE_TEST 535 select CRYPTO_HASH 536 help 537 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 538 hw accelerator. 539 Select this if you want to use the Atmel module for 540 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. 541 542 To compile this driver as a module, choose M here: the module 543 will be called atmel-sha. 544 545config CRYPTO_DEV_ATMEL_I2C 546 tristate 547 548config CRYPTO_DEV_ATMEL_ECC 549 tristate "Support for Microchip / Atmel ECC hw accelerator" 550 depends on I2C 551 select CRYPTO_DEV_ATMEL_I2C 552 select CRYPTO_ECDH 553 select CRC16 554 help 555 Microhip / Atmel ECC hw accelerator. 556 Select this if you want to use the Microchip / Atmel module for 557 ECDH algorithm. 558 559 To compile this driver as a module, choose M here: the module 560 will be called atmel-ecc. 561 562config CRYPTO_DEV_ATMEL_SHA204A 563 tristate "Support for Microchip / Atmel SHA accelerator and RNG" 564 depends on I2C 565 select CRYPTO_DEV_ATMEL_I2C 566 select HW_RANDOM 567 select CRC16 568 help 569 Microhip / Atmel SHA accelerator and RNG. 570 Select this if you want to use the Microchip / Atmel SHA204A 571 module as a random number generator. (Other functions of the 572 chip are currently not exposed by this driver) 573 574 To compile this driver as a module, choose M here: the module 575 will be called atmel-sha204a. 576 577config CRYPTO_DEV_CCP 578 bool "Support for AMD Secure Processor" 579 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM 580 help 581 The AMD Secure Processor provides support for the Cryptographic Coprocessor 582 (CCP) and the Platform Security Processor (PSP) devices. 583 584if CRYPTO_DEV_CCP 585 source "drivers/crypto/ccp/Kconfig" 586endif 587 588config CRYPTO_DEV_MXS_DCP 589 tristate "Support for Freescale MXS DCP" 590 depends on (ARCH_MXS || ARCH_MXC) 591 select STMP_DEVICE 592 select CRYPTO_CBC 593 select CRYPTO_ECB 594 select CRYPTO_AES 595 select CRYPTO_BLKCIPHER 596 select CRYPTO_HASH 597 help 598 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB 599 co-processor on the die. 600 601 To compile this driver as a module, choose M here: the module 602 will be called mxs-dcp. 603 604source "drivers/crypto/qat/Kconfig" 605source "drivers/crypto/cavium/cpt/Kconfig" 606source "drivers/crypto/cavium/nitrox/Kconfig" 607 608config CRYPTO_DEV_CAVIUM_ZIP 609 tristate "Cavium ZIP driver" 610 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) 611 ---help--- 612 Select this option if you want to enable compression/decompression 613 acceleration on Cavium's ARM based SoCs 614 615config CRYPTO_DEV_QCE 616 tristate "Qualcomm crypto engine accelerator" 617 depends on ARCH_QCOM || COMPILE_TEST 618 depends on HAS_IOMEM 619 select CRYPTO_AES 620 select CRYPTO_LIB_DES 621 select CRYPTO_ECB 622 select CRYPTO_CBC 623 select CRYPTO_XTS 624 select CRYPTO_CTR 625 select CRYPTO_BLKCIPHER 626 help 627 This driver supports Qualcomm crypto engine accelerator 628 hardware. To compile this driver as a module, choose M here. The 629 module will be called qcrypto. 630 631config CRYPTO_DEV_QCOM_RNG 632 tristate "Qualcomm Random Number Generator Driver" 633 depends on ARCH_QCOM || COMPILE_TEST 634 select CRYPTO_RNG 635 help 636 This driver provides support for the Random Number 637 Generator hardware found on Qualcomm SoCs. 638 639 To compile this driver as a module, choose M here. The 640 module will be called qcom-rng. If unsure, say N. 641 642config CRYPTO_DEV_VMX 643 bool "Support for VMX cryptographic acceleration instructions" 644 depends on PPC64 && VSX 645 help 646 Support for VMX cryptographic acceleration instructions. 647 648source "drivers/crypto/vmx/Kconfig" 649 650config CRYPTO_DEV_IMGTEC_HASH 651 tristate "Imagination Technologies hardware hash accelerator" 652 depends on MIPS || COMPILE_TEST 653 select CRYPTO_MD5 654 select CRYPTO_SHA1 655 select CRYPTO_SHA256 656 select CRYPTO_HASH 657 help 658 This driver interfaces with the Imagination Technologies 659 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 660 hashing algorithms. 661 662config CRYPTO_DEV_SUN4I_SS 663 tristate "Support for Allwinner Security System cryptographic accelerator" 664 depends on ARCH_SUNXI && !64BIT 665 select CRYPTO_MD5 666 select CRYPTO_SHA1 667 select CRYPTO_AES 668 select CRYPTO_LIB_DES 669 select CRYPTO_BLKCIPHER 670 help 671 Some Allwinner SoC have a crypto accelerator named 672 Security System. Select this if you want to use it. 673 The Security System handle AES/DES/3DES ciphers in CBC mode 674 and SHA1 and MD5 hash algorithms. 675 676 To compile this driver as a module, choose M here: the module 677 will be called sun4i-ss. 678 679config CRYPTO_DEV_SUN4I_SS_PRNG 680 bool "Support for Allwinner Security System PRNG" 681 depends on CRYPTO_DEV_SUN4I_SS 682 select CRYPTO_RNG 683 help 684 Select this option if you want to provide kernel-side support for 685 the Pseudo-Random Number Generator found in the Security System. 686 687config CRYPTO_DEV_ROCKCHIP 688 tristate "Rockchip's Cryptographic Engine driver" 689 depends on OF && ARCH_ROCKCHIP 690 select CRYPTO_AES 691 select CRYPTO_LIB_DES 692 select CRYPTO_MD5 693 select CRYPTO_SHA1 694 select CRYPTO_SHA256 695 select CRYPTO_HASH 696 select CRYPTO_BLKCIPHER 697 698 help 699 This driver interfaces with the hardware crypto accelerator. 700 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. 701 702config CRYPTO_DEV_MEDIATEK 703 tristate "MediaTek's EIP97 Cryptographic Engine driver" 704 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST 705 select CRYPTO_AES 706 select CRYPTO_AEAD 707 select CRYPTO_BLKCIPHER 708 select CRYPTO_CTR 709 select CRYPTO_SHA1 710 select CRYPTO_SHA256 711 select CRYPTO_SHA512 712 select CRYPTO_HMAC 713 help 714 This driver allows you to utilize the hardware crypto accelerator 715 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc .... 716 Select this if you want to use it for AES/SHA1/SHA2 algorithms. 717 718source "drivers/crypto/chelsio/Kconfig" 719 720source "drivers/crypto/virtio/Kconfig" 721 722config CRYPTO_DEV_BCM_SPU 723 tristate "Broadcom symmetric crypto/hash acceleration support" 724 depends on ARCH_BCM_IPROC 725 depends on MAILBOX 726 default m 727 select CRYPTO_AUTHENC 728 select CRYPTO_LIB_DES 729 select CRYPTO_MD5 730 select CRYPTO_SHA1 731 select CRYPTO_SHA256 732 select CRYPTO_SHA512 733 help 734 This driver provides support for Broadcom crypto acceleration using the 735 Secure Processing Unit (SPU). The SPU driver registers ablkcipher, 736 ahash, and aead algorithms with the kernel cryptographic API. 737 738source "drivers/crypto/stm32/Kconfig" 739 740config CRYPTO_DEV_SAFEXCEL 741 tristate "Inside Secure's SafeXcel cryptographic engine driver" 742 depends on OF || PCI || COMPILE_TEST 743 select CRYPTO_LIB_AES 744 select CRYPTO_AUTHENC 745 select CRYPTO_BLKCIPHER 746 select CRYPTO_LIB_DES 747 select CRYPTO_HASH 748 select CRYPTO_HMAC 749 select CRYPTO_MD5 750 select CRYPTO_SHA1 751 select CRYPTO_SHA256 752 select CRYPTO_SHA512 753 help 754 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic 755 engines designed by Inside Secure. It currently accelerates DES, 3DES and 756 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256, 757 SHA384 and SHA512 hash algorithms for both basic hash and HMAC. 758 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations. 759 760config CRYPTO_DEV_ARTPEC6 761 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." 762 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST) 763 depends on OF 764 select CRYPTO_AEAD 765 select CRYPTO_AES 766 select CRYPTO_ALGAPI 767 select CRYPTO_BLKCIPHER 768 select CRYPTO_CTR 769 select CRYPTO_HASH 770 select CRYPTO_SHA1 771 select CRYPTO_SHA256 772 select CRYPTO_SHA512 773 help 774 Enables the driver for the on-chip crypto accelerator 775 of Axis ARTPEC SoCs. 776 777 To compile this driver as a module, choose M here. 778 779config CRYPTO_DEV_CCREE 780 tristate "Support for ARM TrustZone CryptoCell family of security processors" 781 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA 782 default n 783 select CRYPTO_HASH 784 select CRYPTO_BLKCIPHER 785 select CRYPTO_LIB_DES 786 select CRYPTO_AEAD 787 select CRYPTO_AUTHENC 788 select CRYPTO_SHA1 789 select CRYPTO_MD5 790 select CRYPTO_SHA256 791 select CRYPTO_SHA512 792 select CRYPTO_HMAC 793 select CRYPTO_AES 794 select CRYPTO_CBC 795 select CRYPTO_ECB 796 select CRYPTO_CTR 797 select CRYPTO_XTS 798 select CRYPTO_SM4 799 select CRYPTO_SM3 800 help 801 Say 'Y' to enable a driver for the REE interface of the Arm 802 TrustZone CryptoCell family of processors. Currently the 803 CryptoCell 713, 703, 712, 710 and 630 are supported. 804 Choose this if you wish to use hardware acceleration of 805 cryptographic operations on the system REE. 806 If unsure say Y. 807 808source "drivers/crypto/hisilicon/Kconfig" 809 810endif # CRYPTO_HW 811