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1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2019 MediaTek Inc. */
3 
4 #ifndef __MT7615_H
5 #define __MT7615_H
6 
7 #include <linux/interrupt.h>
8 #include <linux/ktime.h>
9 #include "../mt76.h"
10 #include "regs.h"
11 
12 #define MT7615_MAX_INTERFACES		4
13 #define MT7615_MAX_WMM_SETS		4
14 #define MT7615_WTBL_SIZE		128
15 #define MT7615_WTBL_RESERVED		(MT7615_WTBL_SIZE - 1)
16 #define MT7615_WTBL_STA			(MT7615_WTBL_RESERVED - \
17 					 MT7615_MAX_INTERFACES)
18 
19 #define MT7615_WATCHDOG_TIME		(HZ / 10)
20 #define MT7615_RATE_RETRY		2
21 
22 #define MT7615_TX_RING_SIZE		1024
23 #define MT7615_TX_MCU_RING_SIZE		128
24 #define MT7615_TX_FWDL_RING_SIZE	128
25 
26 #define MT7615_RX_RING_SIZE		1024
27 #define MT7615_RX_MCU_RING_SIZE		512
28 
29 #define MT7615_FIRMWARE_CR4		"mediatek/mt7615_cr4.bin"
30 #define MT7615_FIRMWARE_N9		"mediatek/mt7615_n9.bin"
31 #define MT7615_ROM_PATCH		"mediatek/mt7615_rom_patch.bin"
32 
33 #define MT7615_EEPROM_SIZE		1024
34 #define MT7615_TOKEN_SIZE		4096
35 
36 #define MT_FRAC_SCALE		12
37 #define MT_FRAC(val, div)	(((val) << MT_FRAC_SCALE) / (div))
38 
39 struct mt7615_vif;
40 struct mt7615_sta;
41 
42 enum mt7615_hw_txq_id {
43 	MT7615_TXQ_MAIN,
44 	MT7615_TXQ_EXT,
45 	MT7615_TXQ_MCU,
46 	MT7615_TXQ_FWDL,
47 };
48 
49 struct mt7615_rate_set {
50 	struct ieee80211_tx_rate probe_rate;
51 	struct ieee80211_tx_rate rates[4];
52 };
53 
54 struct mt7615_sta {
55 	struct mt76_wcid wcid; /* must be first */
56 
57 	struct mt7615_vif *vif;
58 
59 	struct ieee80211_tx_rate rates[4];
60 
61 	struct mt7615_rate_set rateset[2];
62 	u32 rate_set_tsf;
63 
64 	u8 rate_count;
65 	u8 n_rates;
66 
67 	u8 rate_probe;
68 };
69 
70 struct mt7615_vif {
71 	u8 idx;
72 	u8 omac_idx;
73 	u8 band_idx;
74 	u8 wmm_idx;
75 
76 	struct mt7615_sta sta;
77 };
78 
79 struct mt7615_dev {
80 	struct mt76_dev mt76; /* must be first */
81 	u32 vif_mask;
82 	u32 omac_mask;
83 
84 	struct {
85 		u8 n_pulses;
86 		u32 period;
87 		u16 width;
88 		s16 power;
89 	} radar_pattern;
90 	u32 hw_pattern;
91 	int dfs_state;
92 
93 	int false_cca_ofdm, false_cca_cck;
94 	unsigned long last_cca_adj;
95 	u8 mac_work_count;
96 	s8 ofdm_sensitivity;
97 	s8 cck_sensitivity;
98 	bool scs_en;
99 
100 	spinlock_t token_lock;
101 	struct idr token;
102 };
103 
104 enum {
105 	HW_BSSID_0 = 0x0,
106 	HW_BSSID_1,
107 	HW_BSSID_2,
108 	HW_BSSID_3,
109 	HW_BSSID_MAX,
110 	EXT_BSSID_START = 0x10,
111 	EXT_BSSID_1,
112 	EXT_BSSID_2,
113 	EXT_BSSID_3,
114 	EXT_BSSID_4,
115 	EXT_BSSID_5,
116 	EXT_BSSID_6,
117 	EXT_BSSID_7,
118 	EXT_BSSID_8,
119 	EXT_BSSID_9,
120 	EXT_BSSID_10,
121 	EXT_BSSID_11,
122 	EXT_BSSID_12,
123 	EXT_BSSID_13,
124 	EXT_BSSID_14,
125 	EXT_BSSID_15,
126 	EXT_BSSID_END
127 };
128 
129 enum {
130 	MT_HW_RDD0,
131 	MT_HW_RDD1,
132 };
133 
134 enum {
135 	MT_RX_SEL0,
136 	MT_RX_SEL1,
137 };
138 
139 enum mt7615_rdd_cmd {
140 	RDD_STOP,
141 	RDD_START,
142 	RDD_DET_MODE,
143 	RDD_DET_STOP,
144 	RDD_CAC_START,
145 	RDD_CAC_END,
146 	RDD_NORMAL_START,
147 	RDD_DISABLE_DFS_CAL,
148 	RDD_PULSE_DBG,
149 	RDD_READ_PULSE,
150 	RDD_RESUME_BF,
151 };
152 
153 extern const struct ieee80211_ops mt7615_ops;
154 extern struct pci_driver mt7615_pci_driver;
155 
156 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);
157 
158 int mt7615_register_device(struct mt7615_dev *dev);
159 void mt7615_unregister_device(struct mt7615_dev *dev);
160 int mt7615_eeprom_init(struct mt7615_dev *dev);
161 int mt7615_eeprom_get_power_index(struct mt7615_dev *dev,
162 				  struct ieee80211_channel *chan,
163 				  u8 chain_idx);
164 int mt7615_dma_init(struct mt7615_dev *dev);
165 void mt7615_dma_cleanup(struct mt7615_dev *dev);
166 int mt7615_mcu_init(struct mt7615_dev *dev);
167 int mt7615_mcu_set_dev_info(struct mt7615_dev *dev,
168 			    struct ieee80211_vif *vif, bool enable);
169 int mt7615_mcu_set_bss_info(struct mt7615_dev *dev, struct ieee80211_vif *vif,
170 			    int en);
171 void mt7615_mac_set_rates(struct mt7615_dev *dev, struct mt7615_sta *sta,
172 			  struct ieee80211_tx_rate *probe_rate,
173 			  struct ieee80211_tx_rate *rates);
174 int mt7615_mcu_wtbl_bmc(struct mt7615_dev *dev, struct ieee80211_vif *vif,
175 			bool enable);
176 int mt7615_mcu_add_wtbl(struct mt7615_dev *dev, struct ieee80211_vif *vif,
177 			struct ieee80211_sta *sta);
178 int mt7615_mcu_del_wtbl(struct mt7615_dev *dev, struct ieee80211_sta *sta);
179 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev);
180 int mt7615_mcu_set_sta_rec_bmc(struct mt7615_dev *dev,
181 			       struct ieee80211_vif *vif, bool en);
182 int mt7615_mcu_set_sta_rec(struct mt7615_dev *dev, struct ieee80211_vif *vif,
183 			   struct ieee80211_sta *sta, bool en);
184 int mt7615_mcu_set_bcn(struct mt7615_dev *dev, struct ieee80211_vif *vif,
185 		       int en);
186 int mt7615_mcu_set_channel(struct mt7615_dev *dev);
187 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue,
188 		       const struct ieee80211_tx_queue_params *params);
189 int mt7615_mcu_set_tx_ba(struct mt7615_dev *dev,
190 			 struct ieee80211_ampdu_params *params,
191 			 bool add);
192 int mt7615_mcu_set_rx_ba(struct mt7615_dev *dev,
193 			 struct ieee80211_ampdu_params *params,
194 			 bool add);
195 int mt7615_mcu_set_ht_cap(struct mt7615_dev *dev, struct ieee80211_vif *vif,
196 			  struct ieee80211_sta *sta);
197 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb);
198 int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev,
199 		       enum mt7615_rdd_cmd cmd, u8 index,
200 		       u8 rx_sel, u8 val);
201 int mt7615_dfs_start_radar_detector(struct mt7615_dev *dev);
202 int mt7615_dfs_stop_radar_detector(struct mt7615_dev *dev);
203 int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev);
204 
is_mt7622(struct mt76_dev * dev)205 static inline bool is_mt7622(struct mt76_dev *dev)
206 {
207 	return mt76_chip(dev) == 0x7622;
208 }
209 
mt7615_dfs_check_channel(struct mt7615_dev * dev)210 static inline void mt7615_dfs_check_channel(struct mt7615_dev *dev)
211 {
212 	enum nl80211_chan_width width = dev->mt76.chandef.width;
213 	u32 freq = dev->mt76.chandef.chan->center_freq;
214 	struct ieee80211_hw *hw = mt76_hw(dev);
215 
216 	if (hw->conf.chandef.chan->center_freq != freq ||
217 	    hw->conf.chandef.width != width)
218 		dev->dfs_state = -1;
219 }
220 
mt7615_irq_enable(struct mt7615_dev * dev,u32 mask)221 static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask)
222 {
223 	mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask);
224 }
225 
mt7615_irq_disable(struct mt7615_dev * dev,u32 mask)226 static inline void mt7615_irq_disable(struct mt7615_dev *dev, u32 mask)
227 {
228 	mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
229 }
230 
231 void mt7615_update_channel(struct mt76_dev *mdev);
232 void mt7615_mac_cca_stats_reset(struct mt7615_dev *dev);
233 void mt7615_mac_set_scs(struct mt7615_dev *dev, bool enable);
234 int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
235 			  struct sk_buff *skb, struct mt76_wcid *wcid,
236 			  struct ieee80211_sta *sta, int pid,
237 			  struct ieee80211_key_conf *key);
238 int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb);
239 void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data);
240 void mt7615_mac_tx_free(struct mt7615_dev *dev, struct sk_buff *skb);
241 int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
242 			    struct ieee80211_key_conf *key,
243 			    enum set_key_cmd cmd);
244 
245 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);
246 int mt7615_mcu_init_mac(struct mt7615_dev *dev);
247 int mt7615_mcu_set_rts_thresh(struct mt7615_dev *dev, u32 val);
248 int mt7615_mcu_ctrl_pm_state(struct mt7615_dev *dev, int enter);
249 int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index);
250 int mt7615_mcu_set_tx_power(struct mt7615_dev *dev);
251 void mt7615_mcu_exit(struct mt7615_dev *dev);
252 
253 int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
254 			  enum mt76_txq_id qid, struct mt76_wcid *wcid,
255 			  struct ieee80211_sta *sta,
256 			  struct mt76_tx_info *tx_info);
257 
258 void mt7615_tx_complete_skb(struct mt76_dev *mdev, enum mt76_txq_id qid,
259 			    struct mt76_queue_entry *e);
260 
261 void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
262 			 struct sk_buff *skb);
263 void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
264 int mt7615_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
265 		   struct ieee80211_sta *sta);
266 void mt7615_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif,
267 		      struct ieee80211_sta *sta);
268 void mt7615_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
269 		       struct ieee80211_sta *sta);
270 void mt7615_mac_work(struct work_struct *work);
271 void mt7615_txp_skb_unmap(struct mt76_dev *dev,
272 			  struct mt76_txwi_cache *txwi);
273 int mt76_dfs_start_rdd(struct mt7615_dev *dev, bool force);
274 int mt7615_dfs_init_radar_detector(struct mt7615_dev *dev);
275 
276 int mt7615_init_debugfs(struct mt7615_dev *dev);
277 
278 #endif
279