| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_vmid.h | 37 #define SRI(reg_name, block, id)\ macro
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| D | dcn20_mmhubbub.h | 43 #define SRI(reg_name, block, id)\ macro
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| D | dcn20_dwb.h | 41 #define SRI(reg_name, block, id)\ macro
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| D | dcn20_resource.c | 316 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
| D | dce112_clk_mgr.c | 41 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| D | dce110_clk_mgr.c | 39 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/irq/dce120/ |
| D | irq_service_dce120.c | 100 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/irq/dcn20/ |
| D | irq_service_dcn20.c | 183 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/irq/dcn21/ |
| D | irq_service_dcn21.c | 179 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/irq/dcn10/ |
| D | irq_service_dcn10.c | 181 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_dwb.h | 40 #define SRI(reg_name, block, id)\ macro
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| D | dcn10_resource.c | 173 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/dce120/ |
| D | dce120_resource.c | 141 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/dce80/ |
| D | dce80_resource.c | 155 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/dce100/ |
| D | dce100_resource.c | 138 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/dce112/ |
| D | dce112_resource.c | 148 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_resource.c | 149 #define SRI(reg_name, block, id)\ macro
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| /drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_resource.c | 289 #define SRI(reg_name, block, id)\ macro
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