| /drivers/gpio/ |
| D | gpio-omap.c | 81 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) argument
106 static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, in omap_set_gpio_direction()
115 static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, in omap_set_gpio_dataout_reg()
133 static void omap_set_gpio_dataout_mask(struct gpio_bank *bank, unsigned offset, in omap_set_gpio_dataout_mask()
140 static inline void omap_gpio_dbck_enable(struct gpio_bank *bank) in omap_gpio_dbck_enable()
151 static inline void omap_gpio_dbck_disable(struct gpio_bank *bank) in omap_gpio_dbck_disable()
178 static int omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, in omap2_set_gpio_debounce()
230 static void omap_clear_gpio_debounce(struct gpio_bank *bank, unsigned offset) in omap_clear_gpio_debounce()
260 static bool omap_gpio_is_off_wakeup_capable(struct gpio_bank *bank, u32 gpio_mask) in omap_gpio_is_off_wakeup_capable()
270 static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, in omap_set_gpio_trigger()
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| D | gpio-brcmstb.c | 36 #define GIO_BANK_OFF(bank, off) (((bank) * GIO_BANK_SIZE) + (off * sizeof(u32))) argument
37 #define GIO_ODEN(bank) GIO_BANK_OFF(bank, GIO_REG_ODEN) argument
38 #define GIO_DATA(bank) GIO_BANK_OFF(bank, GIO_REG_DATA) argument
39 #define GIO_IODIR(bank) GIO_BANK_OFF(bank, GIO_REG_IODIR) argument
40 #define GIO_EC(bank) GIO_BANK_OFF(bank, GIO_REG_EC) argument
41 #define GIO_EI(bank) GIO_BANK_OFF(bank, GIO_REG_EI) argument
42 #define GIO_MASK(bank) GIO_BANK_OFF(bank, GIO_REG_MASK) argument
43 #define GIO_LEVEL(bank) GIO_BANK_OFF(bank, GIO_REG_LEVEL) argument
44 #define GIO_STAT(bank) GIO_BANK_OFF(bank, GIO_REG_STAT) argument
76 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); in brcmstb_gpio_gc_to_priv() local
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| D | gpio-aspeed.c | 32 unsigned int bank; member
209 const struct aspeed_gpio_bank *bank, in bank_reg()
253 unsigned int bank = GPIO_BANK(offset); in to_bank() local
281 const struct aspeed_gpio_bank *bank = to_bank(offset); in have_gpio() local
306 const struct aspeed_gpio_bank *bank, in aspeed_gpio_change_cmd_source()
340 const struct aspeed_gpio_bank *bank = to_bank(offset); in aspeed_gpio_copro_request() local
364 const struct aspeed_gpio_bank *bank = to_bank(offset); in aspeed_gpio_copro_release() local
384 const struct aspeed_gpio_bank *bank = to_bank(offset); in aspeed_gpio_get() local
393 const struct aspeed_gpio_bank *bank = to_bank(offset); in __aspeed_gpio_set() local
429 const struct aspeed_gpio_bank *bank = to_bank(offset); in aspeed_gpio_dir_in() local
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| D | sgpio-aspeed.c | 90 const struct aspeed_sgpio_bank *bank, in bank_reg()
120 unsigned int bank = GPIO_BANK(offset); in to_bank() local
129 const struct aspeed_sgpio_bank *bank = to_bank(offset); in aspeed_sgpio_get() local
149 const struct aspeed_sgpio_bank *bank = to_bank(offset); in sgpio_set_value() local
219 const struct aspeed_sgpio_bank **bank, in irqd_to_aspeed_sgpio_data()
235 const struct aspeed_sgpio_bank *bank; in aspeed_sgpio_irq_ack() local
255 const struct aspeed_sgpio_bank *bank; in aspeed_sgpio_irq_set_mask() local
294 const struct aspeed_sgpio_bank *bank; in aspeed_sgpio_set_type() local
359 const struct aspeed_sgpio_bank *bank = &aspeed_sgpio_banks[i]; in aspeed_sgpio_irq_handler() local
385 const struct aspeed_sgpio_bank *bank; in aspeed_sgpio_setup_irqs() local
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| D | gpio-tegra.c | 62 unsigned int bank; member
107 static unsigned int tegra_gpio_compose(unsigned int bank, unsigned int port, in tegra_gpio_compose()
225 struct tegra_gpio_bank *bank = &tgi->bank_info[GPIO_BANK(offset)]; in tegra_gpio_set_debounce() local
275 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); in tegra_gpio_irq_ack() local
284 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); in tegra_gpio_irq_mask() local
293 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); in tegra_gpio_irq_unmask() local
303 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); in tegra_gpio_irq_set_type() local
364 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); in tegra_gpio_irq_shutdown() local
378 struct tegra_gpio_bank *bank = irq_desc_get_handler_data(desc); in tegra_gpio_irq_handler() local
422 struct tegra_gpio_bank *bank = &tgi->bank_info[b]; in tegra_gpio_resume() local
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| D | gpio-f7188x.c | 67 struct f7188x_gpio_bank *bank; member
240 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); in f7188x_gpio_get_direction() local
259 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); in f7188x_gpio_direction_in() local
280 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); in f7188x_gpio_get() local
305 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); in f7188x_gpio_direction_out() local
333 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); in f7188x_gpio_set() local
357 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); in f7188x_gpio_set_config() local
434 struct f7188x_gpio_bank *bank = &data->bank[i]; in f7188x_gpio_probe() local
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| D | gpio-bcm-kona.c | 38 #define GPIO_OUT_STATUS(bank) (0x00000000 + ((bank) << 2)) argument
39 #define GPIO_IN_STATUS(bank) (0x00000020 + ((bank) << 2)) argument
40 #define GPIO_OUT_SET(bank) (0x00000040 + ((bank) << 2)) argument
41 #define GPIO_OUT_CLEAR(bank) (0x00000060 + ((bank) << 2)) argument
42 #define GPIO_INT_STATUS(bank) (0x00000080 + ((bank) << 2)) argument
43 #define GPIO_INT_MASK(bank) (0x000000a0 + ((bank) << 2)) argument
44 #define GPIO_INT_MSKCLR(bank) (0x000000c0 + ((bank) << 2)) argument
45 #define GPIO_PWD_STATUS(bank) (0x00000500 + ((bank) << 2)) argument
453 struct bcm_kona_gpio_bank *bank = irq_desc_get_handler_data(desc); in bcm_kona_gpio_irq_handler() local
571 struct bcm_kona_gpio_bank *bank; in bcm_kona_gpio_probe() local
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| /drivers/pinctrl/sh-pfc/ |
| D | sh_pfc.h | 444 #define PORT_GP_CFG_1(bank, pin, fn, sfx, cfg) \ argument
446 #define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0) argument
448 #define PORT_GP_CFG_4(bank, fn, sfx, cfg) \ argument
453 #define PORT_GP_4(bank, fn, sfx) PORT_GP_CFG_4(bank, fn, sfx, 0) argument
455 #define PORT_GP_CFG_6(bank, fn, sfx, cfg) \ argument
459 #define PORT_GP_6(bank, fn, sfx) PORT_GP_CFG_6(bank, fn, sfx, 0) argument
461 #define PORT_GP_CFG_8(bank, fn, sfx, cfg) \ argument
465 #define PORT_GP_8(bank, fn, sfx) PORT_GP_CFG_8(bank, fn, sfx, 0) argument
467 #define PORT_GP_CFG_9(bank, fn, sfx, cfg) \ argument
470 #define PORT_GP_9(bank, fn, sfx) PORT_GP_CFG_9(bank, fn, sfx, 0) argument
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| /drivers/crypto/qat/qat_common/ |
| D | adf_transport.c | 80 static int adf_reserve_ring(struct adf_etr_bank_data *bank, uint32_t ring) in adf_reserve_ring()
92 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, uint32_t ring) in adf_unreserve_ring()
99 static void adf_enable_ring_irq(struct adf_etr_bank_data *bank, uint32_t ring) in adf_enable_ring_irq()
109 static void adf_disable_ring_irq(struct adf_etr_bank_data *bank, uint32_t ring) in adf_disable_ring_irq()
180 struct adf_etr_bank_data *bank = ring->bank; in adf_init_ring() local
237 struct adf_etr_bank_data *bank; in adf_create_ring() local
314 struct adf_etr_bank_data *bank = ring->bank; in adf_remove_ring() local
331 static void adf_ring_response_handler(struct adf_etr_bank_data *bank) in adf_ring_response_handler()
346 struct adf_etr_bank_data *bank = (void *)bank_addr; in adf_response_handler() local
371 static void adf_get_coalesc_timer(struct adf_etr_bank_data *bank, in adf_get_coalesc_timer()
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| D | adf_transport_access_macros.h | 121 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
124 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
127 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument
130 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ argument
133 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ argument
143 #define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \ argument
146 #define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \ argument
149 #define WRITE_CSR_INT_FLAG(csr_base_addr, bank, value) \ argument
152 #define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \ argument
159 #define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \ argument
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| /drivers/pinctrl/samsung/ |
| D | pinctrl-exynos.c | 54 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_mask() local
72 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_ack() local
82 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_unmask() local
111 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_set_type() local
152 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_request_resources() local
184 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_release_resources() local
246 struct samsung_pin_bank *bank = d->pin_banks; in exynos_eint_gpio_irq() local
276 struct samsung_pin_bank *bank; in exynos_eint_gpio_init() local
332 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_wkup_irq_set_wake() local
418 struct samsung_pin_bank *bank = eintd->bank; in exynos_irq_eint0_15() local
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| D | pinctrl-s3c24xx.c | 101 struct samsung_pin_bank *bank; member
139 struct samsung_pin_bank *bank, int pin) in s3c24xx_eint_set_function()
165 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); in s3c24xx_eint_type() local
199 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); in s3c2410_eint0_3_ack() local
210 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); in s3c2410_eint0_3_mask() local
221 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); in s3c2410_eint0_3_unmask() local
256 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); in s3c2412_eint0_3_ack() local
265 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); in s3c2412_eint0_3_mask() local
276 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); in s3c2412_eint0_3_unmask() local
316 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); in s3c24xx_eint_ack() local
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| D | pinctrl-samsung.c | 359 struct samsung_pin_bank **bank) in pin_to_reg_bank()
381 struct samsung_pin_bank *bank; in samsung_pinmux_setup() local
436 struct samsung_pin_bank *bank; in samsung_pinconf_rw() local
544 struct samsung_pin_bank *bank = gpiochip_get_data(gc); in samsung_gpio_set_value() local
561 struct samsung_pin_bank *bank = gpiochip_get_data(gc); in samsung_gpio_set() local
574 struct samsung_pin_bank *bank = gpiochip_get_data(gc); in samsung_gpio_get() local
595 struct samsung_pin_bank *bank; in samsung_gpio_set_direction() local
625 struct samsung_pin_bank *bank = gpiochip_get_data(gc); in samsung_gpio_direction_input() local
639 struct samsung_pin_bank *bank = gpiochip_get_data(gc); in samsung_gpio_direction_output() local
657 struct samsung_pin_bank *bank = gpiochip_get_data(gc); in samsung_gpio_to_irq() local
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| D | pinctrl-s3c64xx.c | 213 struct samsung_pin_bank *bank; member
268 struct samsung_pin_bank *bank, int pin) in s3c64xx_irq_set_function()
305 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in s3c64xx_gpio_irq_set_mask() local
331 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in s3c64xx_gpio_irq_ack() local
341 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in s3c64xx_gpio_irq_set_type() local
385 struct samsung_pin_bank *bank = h->host_data; in s3c64xx_gpio_irq_map() local
454 struct samsung_pin_bank *bank; in s3c64xx_eint_gpio_init() local
549 struct samsung_pin_bank *bank = ddata->bank; in s3c64xx_eint0_irq_set_type() local
658 struct samsung_pin_bank *bank = ddata->bank; in s3c64xx_eint0_irq_map() local
693 struct samsung_pin_bank *bank; in s3c64xx_eint_eint0_init() local
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| /drivers/pinctrl/stm32/ |
| D | pinctrl-stm32.c | 151 static void stm32_gpio_backup_value(struct stm32_gpio_bank *bank, in stm32_gpio_backup_value()
158 static void stm32_gpio_backup_mode(struct stm32_gpio_bank *bank, u32 offset, in stm32_gpio_backup_mode()
167 static void stm32_gpio_backup_driving(struct stm32_gpio_bank *bank, u32 offset, in stm32_gpio_backup_driving()
174 static void stm32_gpio_backup_speed(struct stm32_gpio_bank *bank, u32 offset, in stm32_gpio_backup_speed()
181 static void stm32_gpio_backup_bias(struct stm32_gpio_bank *bank, u32 offset, in stm32_gpio_backup_bias()
190 static inline void __stm32_gpio_set(struct stm32_gpio_bank *bank, in __stm32_gpio_set()
207 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); in stm32_gpio_request() local
228 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); in stm32_gpio_get() local
242 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); in stm32_gpio_set() local
255 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); in stm32_gpio_direction_output() local
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| /drivers/pinctrl/ |
| D | pinctrl-rockchip.c | 681 static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin, in rockchip_get_recalced_mux()
1112 static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin, in rockchip_get_mux_route()
1137 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) in rockchip_get_mux()
1188 static int rockchip_verify_mux(struct rockchip_pin_bank *bank, in rockchip_verify_mux()
1226 static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) in rockchip_set_mux()
1304 static void px30_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in px30_calc_pull_reg_and_bit()
1334 static void px30_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, in px30_calc_drv_reg_and_bit()
1364 static int px30_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, in px30_calc_schmitt_reg_and_bit()
1395 static void rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rv1108_calc_pull_reg_and_bit()
1424 static void rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, in rv1108_calc_drv_reg_and_bit()
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| D | pinctrl-pic32.c | 41 #define GPIO_BANK_START(bank) ((bank) * PINS_PER_BANK) argument
1802 struct pic32_gpio_bank *bank = gpiochip_get_data(range->gc); in pic32_gpio_request_enable() local
1816 struct pic32_gpio_bank *bank = gpiochip_get_data(chip); in pic32_gpio_direction_input() local
1826 struct pic32_gpio_bank *bank = gpiochip_get_data(chip); in pic32_gpio_get() local
1834 struct pic32_gpio_bank *bank = gpiochip_get_data(chip); in pic32_gpio_set() local
1846 struct pic32_gpio_bank *bank = gpiochip_get_data(chip); in pic32_gpio_direction_output() local
1882 struct pic32_gpio_bank *bank = pctl_to_bank(pctl, pin); in pic32_pinconf_get() local
1923 struct pic32_gpio_bank *bank = pctl_to_bank(pctl, pin); in pic32_pinconf_set() local
1991 struct pic32_gpio_bank *bank = gpiochip_get_data(chip); in pic32_gpio_get_direction() local
1998 struct pic32_gpio_bank *bank = irqd_to_bank(data); in pic32_gpio_irq_ack() local
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| D | pinctrl-oxnas.c | 30 #define GPIO_BANK_START(bank) ((bank) * PINS_PER_BANK) argument
71 unsigned int bank; member
697 struct oxnas_gpio_bank *bank = gpiochip_get_data(range->gc); in oxnas_ox810se_gpio_request_enable() local
727 struct oxnas_gpio_bank *bank = gpiochip_get_data(range->gc); in oxnas_ox820_gpio_request_enable() local
756 struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); in oxnas_gpio_get_direction() local
765 struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); in oxnas_gpio_direction_input() local
775 struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); in oxnas_gpio_get() local
784 struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); in oxnas_gpio_set() local
796 struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); in oxnas_gpio_direction_output() local
841 struct oxnas_gpio_bank *bank = pctl_to_bank(pctl, pin); in oxnas_ox810se_pinconf_get() local
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| D | pinctrl-pistachio.c | 57 #define GPIO_BANK_BASE(bank) (0x200 + 0x24 * (bank)) argument
846 static inline u32 gpio_readl(struct pistachio_gpio_bank *bank, u32 reg) in gpio_readl()
851 static inline void gpio_writel(struct pistachio_gpio_bank *bank, u32 val, in gpio_writel()
857 static inline void gpio_mask_writel(struct pistachio_gpio_bank *bank, in gpio_mask_writel()
867 static inline void gpio_enable(struct pistachio_gpio_bank *bank, in gpio_enable()
873 static inline void gpio_disable(struct pistachio_gpio_bank *bank, in gpio_disable()
1167 struct pistachio_gpio_bank *bank = gpiochip_get_data(chip); in pistachio_gpio_get_direction() local
1174 struct pistachio_gpio_bank *bank = gpiochip_get_data(chip); in pistachio_gpio_get() local
1188 struct pistachio_gpio_bank *bank = gpiochip_get_data(chip); in pistachio_gpio_set() local
1196 struct pistachio_gpio_bank *bank = gpiochip_get_data(chip); in pistachio_gpio_direction_input() local
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| /drivers/leds/ |
| D | leds-tca6507.c | 171 struct bank { struct
172 int level;
173 int ontime, offtime;
174 int on_dflt, off_dflt;
175 int time_use, level_use;
176 } bank[3]; member
187 int bank; /* Bank used, or -1 */ member
293 static void set_code(struct tca6507_chip *tca, int reg, int bank, int new) in set_code()
310 static void set_level(struct tca6507_chip *tca, int bank, int level) in set_level()
325 static void set_times(struct tca6507_chip *tca, int bank) in set_times()
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| /drivers/pinctrl/sirf/ |
| D | pinctrl-sirf.c | 424 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); in sirfsoc_gpio_irq_ack() local
441 struct sirfsoc_gpio_bank *bank, in __sirfsoc_gpio_irq_mask()
463 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); in sirfsoc_gpio_irq_mask() local
472 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); in sirfsoc_gpio_irq_unmask() local
493 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); in sirfsoc_gpio_irq_type() local
555 struct sirfsoc_gpio_bank *bank; in sirfsoc_gpio_handle_irq() local
613 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); in sirfsoc_gpio_request() local
636 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, offset); in sirfsoc_gpio_free() local
652 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, gpio); in sirfsoc_gpio_direction_input() local
669 struct sirfsoc_gpio_bank *bank, in sirfsoc_gpio_set_output()
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| /drivers/pinctrl/sunxi/ |
| D | pinctrl-sunxi.h | 32 #define SUNXI_PINCTRL_PIN(bank, pin) \ argument
237 u8 bank = pin / PINS_PER_BANK; in sunxi_mux_reg() local
252 u8 bank = pin / PINS_PER_BANK; in sunxi_data_reg() local
267 u8 bank = pin / PINS_PER_BANK; in sunxi_dlevel_reg() local
282 u8 bank = pin / PINS_PER_BANK; in sunxi_pull_reg() local
295 static inline u32 sunxi_irq_hw_bank_num(const struct sunxi_pinctrl_desc *desc, u8 bank) in sunxi_irq_hw_bank_num()
306 u8 bank = irq / IRQ_PER_BANK; in sunxi_irq_cfg_reg() local
319 static inline u32 sunxi_irq_ctrl_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) in sunxi_irq_ctrl_reg_from_bank()
327 u8 bank = irq / IRQ_PER_BANK; in sunxi_irq_ctrl_reg() local
338 static inline u32 sunxi_irq_debounce_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) in sunxi_irq_debounce_reg_from_bank()
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| /drivers/dma/ipu/ |
| D | ipu_irq.c | 72 struct ipu_irq_bank *bank; member
96 struct ipu_irq_bank *bank; in ipu_irq_unmask() local
119 struct ipu_irq_bank *bank; in ipu_irq_mask() local
142 struct ipu_irq_bank *bank; in ipu_irq_ack() local
167 struct ipu_irq_bank *bank; in ipu_irq_status() local
273 struct ipu_irq_bank *bank = irq_bank + i; in ipu_irq_handler() local
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| /drivers/pinctrl/meson/ |
| D | pinctrl-meson.c | 69 struct meson_bank **bank) in meson_get_bank()
93 static void meson_calc_reg_and_bit(struct meson_bank *bank, unsigned int pin, in meson_calc_reg_and_bit()
176 struct meson_bank *bank; in meson_pinconf_set_gpio_bit() local
193 struct meson_bank *bank; in meson_pinconf_get_gpio_bit() local
256 struct meson_bank *bank; in meson_pinconf_disable_bias() local
275 struct meson_bank *bank; in meson_pinconf_enable_bias() local
303 struct meson_bank *bank; in meson_pinconf_set_drive_strength() local
395 struct meson_bank *bank; in meson_pinconf_get_pull() local
431 struct meson_bank *bank; in meson_pinconf_get_drive_strength() local
573 struct meson_bank *bank; in meson_gpio_get() local
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| /drivers/mfd/ |
| D | abx500-core.c | 62 int abx500_set_register_interruptible(struct device *dev, u8 bank, u8 reg, in abx500_set_register_interruptible()
75 int abx500_get_register_interruptible(struct device *dev, u8 bank, u8 reg, in abx500_get_register_interruptible()
88 int abx500_get_register_page_interruptible(struct device *dev, u8 bank, in abx500_get_register_page_interruptible()
102 int abx500_mask_and_set_register_interruptible(struct device *dev, u8 bank, in abx500_mask_and_set_register_interruptible()
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