1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Kernel-based Virtual Machine driver for Linux
4 * cpuid support routines
5 *
6 * derived from arch/x86/kvm/x86.c
7 *
8 * Copyright 2011 Red Hat, Inc. and/or its affiliates.
9 * Copyright IBM Corporation, 2008
10 */
11
12 #include <linux/kvm_host.h>
13 #include <linux/export.h>
14 #include <linux/vmalloc.h>
15 #include <linux/uaccess.h>
16 #include <linux/sched/stat.h>
17
18 #include <asm/processor.h>
19 #include <asm/user.h>
20 #include <asm/fpu/xstate.h>
21 #include "cpuid.h"
22 #include "lapic.h"
23 #include "mmu.h"
24 #include "trace.h"
25 #include "pmu.h"
26
xstate_required_size(u64 xstate_bv,bool compacted)27 static u32 xstate_required_size(u64 xstate_bv, bool compacted)
28 {
29 int feature_bit = 0;
30 u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
31
32 xstate_bv &= XFEATURE_MASK_EXTEND;
33 while (xstate_bv) {
34 if (xstate_bv & 0x1) {
35 u32 eax, ebx, ecx, edx, offset;
36 cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
37 offset = compacted ? ret : ebx;
38 ret = max(ret, offset + eax);
39 }
40
41 xstate_bv >>= 1;
42 feature_bit++;
43 }
44
45 return ret;
46 }
47
kvm_mpx_supported(void)48 bool kvm_mpx_supported(void)
49 {
50 return ((host_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
51 && kvm_x86_ops->mpx_supported());
52 }
53 EXPORT_SYMBOL_GPL(kvm_mpx_supported);
54
kvm_supported_xcr0(void)55 u64 kvm_supported_xcr0(void)
56 {
57 u64 xcr0 = KVM_SUPPORTED_XCR0 & host_xcr0;
58
59 if (!kvm_mpx_supported())
60 xcr0 &= ~(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
61
62 return xcr0;
63 }
64
65 #define F(x) bit(X86_FEATURE_##x)
66
kvm_update_cpuid(struct kvm_vcpu * vcpu)67 int kvm_update_cpuid(struct kvm_vcpu *vcpu)
68 {
69 struct kvm_cpuid_entry2 *best;
70 struct kvm_lapic *apic = vcpu->arch.apic;
71
72 best = kvm_find_cpuid_entry(vcpu, 1, 0);
73 if (!best)
74 return 0;
75
76 /* Update OSXSAVE bit */
77 if (boot_cpu_has(X86_FEATURE_XSAVE) && best->function == 0x1) {
78 best->ecx &= ~F(OSXSAVE);
79 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
80 best->ecx |= F(OSXSAVE);
81 }
82
83 best->edx &= ~F(APIC);
84 if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)
85 best->edx |= F(APIC);
86
87 if (apic) {
88 if (best->ecx & F(TSC_DEADLINE_TIMER))
89 apic->lapic_timer.timer_mode_mask = 3 << 17;
90 else
91 apic->lapic_timer.timer_mode_mask = 1 << 17;
92 }
93
94 best = kvm_find_cpuid_entry(vcpu, 7, 0);
95 if (best) {
96 /* Update OSPKE bit */
97 if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) {
98 best->ecx &= ~F(OSPKE);
99 if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE))
100 best->ecx |= F(OSPKE);
101 }
102 }
103
104 best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
105 if (!best) {
106 vcpu->arch.guest_supported_xcr0 = 0;
107 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
108 } else {
109 vcpu->arch.guest_supported_xcr0 =
110 (best->eax | ((u64)best->edx << 32)) &
111 kvm_supported_xcr0();
112 vcpu->arch.guest_xstate_size = best->ebx =
113 xstate_required_size(vcpu->arch.xcr0, false);
114 }
115
116 best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
117 if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))
118 best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
119
120 /*
121 * The existing code assumes virtual address is 48-bit or 57-bit in the
122 * canonical address checks; exit if it is ever changed.
123 */
124 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
125 if (best) {
126 int vaddr_bits = (best->eax & 0xff00) >> 8;
127
128 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
129 return -EINVAL;
130 }
131
132 best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0);
133 if (kvm_hlt_in_guest(vcpu->kvm) && best &&
134 (best->eax & (1 << KVM_FEATURE_PV_UNHALT)))
135 best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT);
136
137 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)) {
138 best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
139 if (best) {
140 if (vcpu->arch.ia32_misc_enable_msr & MSR_IA32_MISC_ENABLE_MWAIT)
141 best->ecx |= F(MWAIT);
142 else
143 best->ecx &= ~F(MWAIT);
144 }
145 }
146
147 /* Update physical-address width */
148 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
149 kvm_mmu_reset_context(vcpu);
150
151 kvm_pmu_refresh(vcpu);
152 return 0;
153 }
154
is_efer_nx(void)155 static int is_efer_nx(void)
156 {
157 unsigned long long efer = 0;
158
159 rdmsrl_safe(MSR_EFER, &efer);
160 return efer & EFER_NX;
161 }
162
cpuid_fix_nx_cap(struct kvm_vcpu * vcpu)163 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
164 {
165 int i;
166 struct kvm_cpuid_entry2 *e, *entry;
167
168 entry = NULL;
169 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
170 e = &vcpu->arch.cpuid_entries[i];
171 if (e->function == 0x80000001) {
172 entry = e;
173 break;
174 }
175 }
176 if (entry && (entry->edx & F(NX)) && !is_efer_nx()) {
177 entry->edx &= ~F(NX);
178 printk(KERN_INFO "kvm: guest NX capability removed\n");
179 }
180 }
181
cpuid_query_maxphyaddr(struct kvm_vcpu * vcpu)182 int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
183 {
184 struct kvm_cpuid_entry2 *best;
185
186 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
187 if (!best || best->eax < 0x80000008)
188 goto not_found;
189 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
190 if (best)
191 return best->eax & 0xff;
192 not_found:
193 return 36;
194 }
195 EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr);
196
197 /* when an old userspace process fills a new kernel module */
kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu * vcpu,struct kvm_cpuid * cpuid,struct kvm_cpuid_entry __user * entries)198 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
199 struct kvm_cpuid *cpuid,
200 struct kvm_cpuid_entry __user *entries)
201 {
202 int r, i;
203 struct kvm_cpuid_entry *cpuid_entries = NULL;
204
205 r = -E2BIG;
206 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
207 goto out;
208 r = -ENOMEM;
209 if (cpuid->nent) {
210 cpuid_entries =
211 vmalloc(array_size(sizeof(struct kvm_cpuid_entry),
212 cpuid->nent));
213 if (!cpuid_entries)
214 goto out;
215 r = -EFAULT;
216 if (copy_from_user(cpuid_entries, entries,
217 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
218 goto out;
219 }
220 for (i = 0; i < cpuid->nent; i++) {
221 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
222 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
223 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
224 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
225 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
226 vcpu->arch.cpuid_entries[i].index = 0;
227 vcpu->arch.cpuid_entries[i].flags = 0;
228 vcpu->arch.cpuid_entries[i].padding[0] = 0;
229 vcpu->arch.cpuid_entries[i].padding[1] = 0;
230 vcpu->arch.cpuid_entries[i].padding[2] = 0;
231 }
232 vcpu->arch.cpuid_nent = cpuid->nent;
233 cpuid_fix_nx_cap(vcpu);
234 kvm_apic_set_version(vcpu);
235 kvm_x86_ops->cpuid_update(vcpu);
236 r = kvm_update_cpuid(vcpu);
237
238 out:
239 vfree(cpuid_entries);
240 return r;
241 }
242
kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu * vcpu,struct kvm_cpuid2 * cpuid,struct kvm_cpuid_entry2 __user * entries)243 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
244 struct kvm_cpuid2 *cpuid,
245 struct kvm_cpuid_entry2 __user *entries)
246 {
247 int r;
248
249 r = -E2BIG;
250 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
251 goto out;
252 r = -EFAULT;
253 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
254 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
255 goto out;
256 vcpu->arch.cpuid_nent = cpuid->nent;
257 kvm_apic_set_version(vcpu);
258 kvm_x86_ops->cpuid_update(vcpu);
259 r = kvm_update_cpuid(vcpu);
260 out:
261 return r;
262 }
263
kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu * vcpu,struct kvm_cpuid2 * cpuid,struct kvm_cpuid_entry2 __user * entries)264 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
265 struct kvm_cpuid2 *cpuid,
266 struct kvm_cpuid_entry2 __user *entries)
267 {
268 int r;
269
270 r = -E2BIG;
271 if (cpuid->nent < vcpu->arch.cpuid_nent)
272 goto out;
273 r = -EFAULT;
274 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
275 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
276 goto out;
277 return 0;
278
279 out:
280 cpuid->nent = vcpu->arch.cpuid_nent;
281 return r;
282 }
283
cpuid_mask(u32 * word,int wordnum)284 static void cpuid_mask(u32 *word, int wordnum)
285 {
286 *word &= boot_cpu_data.x86_capability[wordnum];
287 }
288
do_host_cpuid(struct kvm_cpuid_entry2 * entry,u32 function,u32 index)289 static void do_host_cpuid(struct kvm_cpuid_entry2 *entry, u32 function,
290 u32 index)
291 {
292 entry->function = function;
293 entry->index = index;
294 entry->flags = 0;
295
296 cpuid_count(entry->function, entry->index,
297 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
298
299 switch (function) {
300 case 2:
301 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
302 break;
303 case 4:
304 case 7:
305 case 0xb:
306 case 0xd:
307 case 0xf:
308 case 0x10:
309 case 0x12:
310 case 0x14:
311 case 0x17:
312 case 0x18:
313 case 0x1f:
314 case 0x8000001d:
315 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
316 break;
317 }
318 }
319
__do_cpuid_func_emulated(struct kvm_cpuid_entry2 * entry,u32 func,int * nent,int maxnent)320 static int __do_cpuid_func_emulated(struct kvm_cpuid_entry2 *entry,
321 u32 func, int *nent, int maxnent)
322 {
323 entry->function = func;
324 entry->index = 0;
325 entry->flags = 0;
326
327 switch (func) {
328 case 0:
329 entry->eax = 7;
330 ++*nent;
331 break;
332 case 1:
333 entry->ecx = F(MOVBE);
334 ++*nent;
335 break;
336 case 7:
337 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
338 entry->eax = 0;
339 entry->ecx = F(RDPID);
340 ++*nent;
341 default:
342 break;
343 }
344
345 return 0;
346 }
347
do_cpuid_7_mask(struct kvm_cpuid_entry2 * entry,int index)348 static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index)
349 {
350 unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
351 unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0;
352 unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0;
353 unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
354 unsigned f_la57;
355
356 /* cpuid 7.0.ebx */
357 const u32 kvm_cpuid_7_0_ebx_x86_features =
358 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
359 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
360 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
361 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
362 F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt;
363
364 /* cpuid 7.0.ecx*/
365 const u32 kvm_cpuid_7_0_ecx_x86_features =
366 F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) |
367 F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
368 F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
369 F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/;
370
371 /* cpuid 7.0.edx*/
372 const u32 kvm_cpuid_7_0_edx_x86_features =
373 F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
374 F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
375 F(MD_CLEAR);
376
377 /* cpuid 7.1.eax */
378 const u32 kvm_cpuid_7_1_eax_x86_features =
379 F(AVX512_BF16);
380
381 switch (index) {
382 case 0:
383 entry->eax = min(entry->eax, 1u);
384 entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
385 cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
386 /* TSC_ADJUST is emulated */
387 entry->ebx |= F(TSC_ADJUST);
388
389 entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
390 f_la57 = entry->ecx & F(LA57);
391 cpuid_mask(&entry->ecx, CPUID_7_ECX);
392 /* Set LA57 based on hardware capability. */
393 entry->ecx |= f_la57;
394 entry->ecx |= f_umip;
395 /* PKU is not yet implemented for shadow paging. */
396 if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
397 entry->ecx &= ~F(PKU);
398
399 entry->edx &= kvm_cpuid_7_0_edx_x86_features;
400 cpuid_mask(&entry->edx, CPUID_7_EDX);
401 if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS))
402 entry->edx |= F(SPEC_CTRL);
403 if (boot_cpu_has(X86_FEATURE_STIBP))
404 entry->edx |= F(INTEL_STIBP);
405 if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
406 boot_cpu_has(X86_FEATURE_AMD_SSBD))
407 entry->edx |= F(SPEC_CTRL_SSBD);
408 /*
409 * We emulate ARCH_CAPABILITIES in software even
410 * if the host doesn't support it.
411 */
412 entry->edx |= F(ARCH_CAPABILITIES);
413 break;
414 case 1:
415 entry->eax &= kvm_cpuid_7_1_eax_x86_features;
416 entry->ebx = 0;
417 entry->ecx = 0;
418 entry->edx = 0;
419 break;
420 default:
421 WARN_ON_ONCE(1);
422 entry->eax = 0;
423 entry->ebx = 0;
424 entry->ecx = 0;
425 entry->edx = 0;
426 break;
427 }
428 }
429
__do_cpuid_func(struct kvm_cpuid_entry2 * entry,u32 function,int * nent,int maxnent)430 static inline int __do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 function,
431 int *nent, int maxnent)
432 {
433 int r;
434 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
435 #ifdef CONFIG_X86_64
436 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
437 ? F(GBPAGES) : 0;
438 unsigned f_lm = F(LM);
439 #else
440 unsigned f_gbpages = 0;
441 unsigned f_lm = 0;
442 #endif
443 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
444 unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
445 unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
446
447 /* cpuid 1.edx */
448 const u32 kvm_cpuid_1_edx_x86_features =
449 F(FPU) | F(VME) | F(DE) | F(PSE) |
450 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
451 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
452 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
453 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
454 0 /* Reserved, DS, ACPI */ | F(MMX) |
455 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
456 0 /* HTT, TM, Reserved, PBE */;
457 /* cpuid 0x80000001.edx */
458 const u32 kvm_cpuid_8000_0001_edx_x86_features =
459 F(FPU) | F(VME) | F(DE) | F(PSE) |
460 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
461 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
462 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
463 F(PAT) | F(PSE36) | 0 /* Reserved */ |
464 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
465 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
466 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
467 /* cpuid 1.ecx */
468 const u32 kvm_cpuid_1_ecx_x86_features =
469 /* NOTE: MONITOR (and MWAIT) are emulated as NOP,
470 * but *not* advertised to guests via CPUID ! */
471 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
472 0 /* DS-CPL, VMX, SMX, EST */ |
473 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
474 F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |
475 F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |
476 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
477 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
478 F(F16C) | F(RDRAND);
479 /* cpuid 0x80000001.ecx */
480 const u32 kvm_cpuid_8000_0001_ecx_x86_features =
481 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
482 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
483 F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
484 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM) |
485 F(TOPOEXT) | F(PERFCTR_CORE);
486
487 /* cpuid 0x80000008.ebx */
488 const u32 kvm_cpuid_8000_0008_ebx_x86_features =
489 F(CLZERO) | F(XSAVEERPTR) |
490 F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
491 F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON);
492
493 /* cpuid 0xC0000001.edx */
494 const u32 kvm_cpuid_C000_0001_edx_x86_features =
495 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
496 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
497 F(PMM) | F(PMM_EN);
498
499 /* cpuid 0xD.1.eax */
500 const u32 kvm_cpuid_D_1_eax_x86_features =
501 F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
502
503 /* all calls to cpuid_count() should be made on the same cpu */
504 get_cpu();
505
506 r = -E2BIG;
507
508 if (WARN_ON(*nent >= maxnent))
509 goto out;
510
511 do_host_cpuid(entry, function, 0);
512 ++*nent;
513
514 switch (function) {
515 case 0:
516 /* Limited to the highest leaf implemented in KVM. */
517 entry->eax = min(entry->eax, 0x1fU);
518 break;
519 case 1:
520 entry->edx &= kvm_cpuid_1_edx_x86_features;
521 cpuid_mask(&entry->edx, CPUID_1_EDX);
522 entry->ecx &= kvm_cpuid_1_ecx_x86_features;
523 cpuid_mask(&entry->ecx, CPUID_1_ECX);
524 /* we support x2apic emulation even if host does not support
525 * it since we emulate x2apic in software */
526 entry->ecx |= F(X2APIC);
527 break;
528 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
529 * may return different values. This forces us to get_cpu() before
530 * issuing the first command, and also to emulate this annoying behavior
531 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
532 case 2: {
533 int t, times = entry->eax & 0xff;
534
535 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
536 for (t = 1; t < times; ++t) {
537 if (*nent >= maxnent)
538 goto out;
539
540 do_host_cpuid(&entry[t], function, 0);
541 ++*nent;
542 }
543 break;
544 }
545 /* functions 4 and 0x8000001d have additional index. */
546 case 4:
547 case 0x8000001d: {
548 int i, cache_type;
549
550 /* read more entries until cache_type is zero */
551 for (i = 1; ; ++i) {
552 if (*nent >= maxnent)
553 goto out;
554
555 cache_type = entry[i - 1].eax & 0x1f;
556 if (!cache_type)
557 break;
558 do_host_cpuid(&entry[i], function, i);
559 ++*nent;
560 }
561 break;
562 }
563 case 6: /* Thermal management */
564 entry->eax = 0x4; /* allow ARAT */
565 entry->ebx = 0;
566 entry->ecx = 0;
567 entry->edx = 0;
568 break;
569 /* function 7 has additional index. */
570 case 7: {
571 int i;
572
573 for (i = 0; ; ) {
574 do_cpuid_7_mask(&entry[i], i);
575 if (i == entry->eax)
576 break;
577 if (*nent >= maxnent)
578 goto out;
579
580 ++i;
581 do_host_cpuid(&entry[i], function, i);
582 ++*nent;
583 }
584 break;
585 }
586 case 9:
587 break;
588 case 0xa: { /* Architectural Performance Monitoring */
589 struct x86_pmu_capability cap;
590 union cpuid10_eax eax;
591 union cpuid10_edx edx;
592
593 perf_get_x86_pmu_capability(&cap);
594
595 /*
596 * Only support guest architectural pmu on a host
597 * with architectural pmu.
598 */
599 if (!cap.version)
600 memset(&cap, 0, sizeof(cap));
601
602 eax.split.version_id = min(cap.version, 2);
603 eax.split.num_counters = cap.num_counters_gp;
604 eax.split.bit_width = cap.bit_width_gp;
605 eax.split.mask_length = cap.events_mask_len;
606
607 edx.split.num_counters_fixed = cap.num_counters_fixed;
608 edx.split.bit_width_fixed = cap.bit_width_fixed;
609 edx.split.reserved = 0;
610
611 entry->eax = eax.full;
612 entry->ebx = cap.events_mask;
613 entry->ecx = 0;
614 entry->edx = edx.full;
615 break;
616 }
617 /*
618 * Per Intel's SDM, the 0x1f is a superset of 0xb,
619 * thus they can be handled by common code.
620 */
621 case 0x1f:
622 case 0xb: {
623 int i;
624
625 /*
626 * We filled in entry[0] for CPUID(EAX=<function>,
627 * ECX=00H) above. If its level type (ECX[15:8]) is
628 * zero, then the leaf is unimplemented, and we're
629 * done. Otherwise, continue to populate entries
630 * until the level type (ECX[15:8]) of the previously
631 * added entry is zero.
632 */
633 for (i = 1; entry[i - 1].ecx & 0xff00; ++i) {
634 if (*nent >= maxnent)
635 goto out;
636
637 do_host_cpuid(&entry[i], function, i);
638 ++*nent;
639 }
640 break;
641 }
642 case 0xd: {
643 int idx, i;
644 u64 supported = kvm_supported_xcr0();
645
646 entry->eax &= supported;
647 entry->ebx = xstate_required_size(supported, false);
648 entry->ecx = entry->ebx;
649 entry->edx &= supported >> 32;
650 if (!supported)
651 break;
652
653 for (idx = 1, i = 1; idx < 64; ++idx) {
654 u64 mask = ((u64)1 << idx);
655 if (*nent >= maxnent)
656 goto out;
657
658 do_host_cpuid(&entry[i], function, idx);
659 if (idx == 1) {
660 entry[i].eax &= kvm_cpuid_D_1_eax_x86_features;
661 cpuid_mask(&entry[i].eax, CPUID_D_1_EAX);
662 entry[i].ebx = 0;
663 if (entry[i].eax & (F(XSAVES)|F(XSAVEC)))
664 entry[i].ebx =
665 xstate_required_size(supported,
666 true);
667 } else {
668 if (entry[i].eax == 0 || !(supported & mask))
669 continue;
670 if (WARN_ON_ONCE(entry[i].ecx & 1))
671 continue;
672 }
673 entry[i].ecx = 0;
674 entry[i].edx = 0;
675 ++*nent;
676 ++i;
677 }
678 break;
679 }
680 /* Intel PT */
681 case 0x14: {
682 int t, times = entry->eax;
683
684 if (!f_intel_pt)
685 break;
686
687 for (t = 1; t <= times; ++t) {
688 if (*nent >= maxnent)
689 goto out;
690 do_host_cpuid(&entry[t], function, t);
691 ++*nent;
692 }
693 break;
694 }
695 case KVM_CPUID_SIGNATURE: {
696 static const char signature[12] = "KVMKVMKVM\0\0";
697 const u32 *sigptr = (const u32 *)signature;
698 entry->eax = KVM_CPUID_FEATURES;
699 entry->ebx = sigptr[0];
700 entry->ecx = sigptr[1];
701 entry->edx = sigptr[2];
702 break;
703 }
704 case KVM_CPUID_FEATURES:
705 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
706 (1 << KVM_FEATURE_NOP_IO_DELAY) |
707 (1 << KVM_FEATURE_CLOCKSOURCE2) |
708 (1 << KVM_FEATURE_ASYNC_PF) |
709 (1 << KVM_FEATURE_PV_EOI) |
710 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
711 (1 << KVM_FEATURE_PV_UNHALT) |
712 (1 << KVM_FEATURE_PV_TLB_FLUSH) |
713 (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
714 (1 << KVM_FEATURE_PV_SEND_IPI) |
715 (1 << KVM_FEATURE_POLL_CONTROL) |
716 (1 << KVM_FEATURE_PV_SCHED_YIELD);
717
718 if (sched_info_on())
719 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
720
721 entry->ebx = 0;
722 entry->ecx = 0;
723 entry->edx = 0;
724 break;
725 case 0x80000000:
726 entry->eax = min(entry->eax, 0x8000001f);
727 break;
728 case 0x80000001:
729 entry->edx &= kvm_cpuid_8000_0001_edx_x86_features;
730 cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
731 entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
732 cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
733 break;
734 case 0x80000007: /* Advanced power management */
735 /* invariant TSC is CPUID.80000007H:EDX[8] */
736 entry->edx &= (1 << 8);
737 /* mask against host */
738 entry->edx &= boot_cpu_data.x86_power;
739 entry->eax = entry->ebx = entry->ecx = 0;
740 break;
741 case 0x80000008: {
742 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
743 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
744 unsigned phys_as = entry->eax & 0xff;
745
746 if (!g_phys_as)
747 g_phys_as = phys_as;
748 entry->eax = g_phys_as | (virt_as << 8);
749 entry->edx = 0;
750 entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features;
751 cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX);
752 /*
753 * AMD has separate bits for each SPEC_CTRL bit.
754 * arch/x86/kernel/cpu/bugs.c is kind enough to
755 * record that in cpufeatures so use them.
756 */
757 if (boot_cpu_has(X86_FEATURE_IBPB))
758 entry->ebx |= F(AMD_IBPB);
759 if (boot_cpu_has(X86_FEATURE_IBRS))
760 entry->ebx |= F(AMD_IBRS);
761 if (boot_cpu_has(X86_FEATURE_STIBP))
762 entry->ebx |= F(AMD_STIBP);
763 if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
764 boot_cpu_has(X86_FEATURE_AMD_SSBD))
765 entry->ebx |= F(AMD_SSBD);
766 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
767 entry->ebx |= F(AMD_SSB_NO);
768 /*
769 * The preference is to use SPEC CTRL MSR instead of the
770 * VIRT_SPEC MSR.
771 */
772 if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
773 !boot_cpu_has(X86_FEATURE_AMD_SSBD))
774 entry->ebx |= F(VIRT_SSBD);
775 break;
776 }
777 case 0x80000019:
778 entry->ecx = entry->edx = 0;
779 break;
780 case 0x8000001a:
781 case 0x8000001e:
782 break;
783 /*Add support for Centaur's CPUID instruction*/
784 case 0xC0000000:
785 /*Just support up to 0xC0000004 now*/
786 entry->eax = min(entry->eax, 0xC0000004);
787 break;
788 case 0xC0000001:
789 entry->edx &= kvm_cpuid_C000_0001_edx_x86_features;
790 cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
791 break;
792 case 3: /* Processor serial number */
793 case 5: /* MONITOR/MWAIT */
794 case 0xC0000002:
795 case 0xC0000003:
796 case 0xC0000004:
797 default:
798 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
799 break;
800 }
801
802 kvm_x86_ops->set_supported_cpuid(function, entry);
803
804 r = 0;
805
806 out:
807 put_cpu();
808
809 return r;
810 }
811
do_cpuid_func(struct kvm_cpuid_entry2 * entry,u32 func,int * nent,int maxnent,unsigned int type)812 static int do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 func,
813 int *nent, int maxnent, unsigned int type)
814 {
815 if (*nent >= maxnent)
816 return -E2BIG;
817
818 if (type == KVM_GET_EMULATED_CPUID)
819 return __do_cpuid_func_emulated(entry, func, nent, maxnent);
820
821 return __do_cpuid_func(entry, func, nent, maxnent);
822 }
823
824 #undef F
825
826 struct kvm_cpuid_param {
827 u32 func;
828 bool (*qualifier)(const struct kvm_cpuid_param *param);
829 };
830
is_centaur_cpu(const struct kvm_cpuid_param * param)831 static bool is_centaur_cpu(const struct kvm_cpuid_param *param)
832 {
833 return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR;
834 }
835
sanity_check_entries(struct kvm_cpuid_entry2 __user * entries,__u32 num_entries,unsigned int ioctl_type)836 static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
837 __u32 num_entries, unsigned int ioctl_type)
838 {
839 int i;
840 __u32 pad[3];
841
842 if (ioctl_type != KVM_GET_EMULATED_CPUID)
843 return false;
844
845 /*
846 * We want to make sure that ->padding is being passed clean from
847 * userspace in case we want to use it for something in the future.
848 *
849 * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we
850 * have to give ourselves satisfied only with the emulated side. /me
851 * sheds a tear.
852 */
853 for (i = 0; i < num_entries; i++) {
854 if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
855 return true;
856
857 if (pad[0] || pad[1] || pad[2])
858 return true;
859 }
860 return false;
861 }
862
kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 * cpuid,struct kvm_cpuid_entry2 __user * entries,unsigned int type)863 int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
864 struct kvm_cpuid_entry2 __user *entries,
865 unsigned int type)
866 {
867 struct kvm_cpuid_entry2 *cpuid_entries;
868 int limit, nent = 0, r = -E2BIG, i;
869 u32 func;
870 static const struct kvm_cpuid_param param[] = {
871 { .func = 0 },
872 { .func = 0x80000000 },
873 { .func = 0xC0000000, .qualifier = is_centaur_cpu },
874 { .func = KVM_CPUID_SIGNATURE },
875 };
876
877 if (cpuid->nent < 1)
878 goto out;
879 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
880 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
881
882 if (sanity_check_entries(entries, cpuid->nent, type))
883 return -EINVAL;
884
885 r = -ENOMEM;
886 cpuid_entries = vzalloc(array_size(sizeof(struct kvm_cpuid_entry2),
887 cpuid->nent));
888 if (!cpuid_entries)
889 goto out;
890
891 r = 0;
892 for (i = 0; i < ARRAY_SIZE(param); i++) {
893 const struct kvm_cpuid_param *ent = ¶m[i];
894
895 if (ent->qualifier && !ent->qualifier(ent))
896 continue;
897
898 r = do_cpuid_func(&cpuid_entries[nent], ent->func,
899 &nent, cpuid->nent, type);
900
901 if (r)
902 goto out_free;
903
904 limit = cpuid_entries[nent - 1].eax;
905 for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func)
906 r = do_cpuid_func(&cpuid_entries[nent], func,
907 &nent, cpuid->nent, type);
908
909 if (r)
910 goto out_free;
911 }
912
913 r = -EFAULT;
914 if (copy_to_user(entries, cpuid_entries,
915 nent * sizeof(struct kvm_cpuid_entry2)))
916 goto out_free;
917 cpuid->nent = nent;
918 r = 0;
919
920 out_free:
921 vfree(cpuid_entries);
922 out:
923 return r;
924 }
925
move_to_next_stateful_cpuid_entry(struct kvm_vcpu * vcpu,int i)926 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
927 {
928 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
929 struct kvm_cpuid_entry2 *ej;
930 int j = i;
931 int nent = vcpu->arch.cpuid_nent;
932
933 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
934 /* when no next entry is found, the current entry[i] is reselected */
935 do {
936 j = (j + 1) % nent;
937 ej = &vcpu->arch.cpuid_entries[j];
938 } while (ej->function != e->function);
939
940 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
941
942 return j;
943 }
944
945 /* find an entry with matching function, matching index (if needed), and that
946 * should be read next (if it's stateful) */
is_matching_cpuid_entry(struct kvm_cpuid_entry2 * e,u32 function,u32 index)947 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
948 u32 function, u32 index)
949 {
950 if (e->function != function)
951 return 0;
952 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
953 return 0;
954 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
955 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
956 return 0;
957 return 1;
958 }
959
kvm_find_cpuid_entry(struct kvm_vcpu * vcpu,u32 function,u32 index)960 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
961 u32 function, u32 index)
962 {
963 int i;
964 struct kvm_cpuid_entry2 *best = NULL;
965
966 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
967 struct kvm_cpuid_entry2 *e;
968
969 e = &vcpu->arch.cpuid_entries[i];
970 if (is_matching_cpuid_entry(e, function, index)) {
971 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
972 move_to_next_stateful_cpuid_entry(vcpu, i);
973 best = e;
974 break;
975 }
976 }
977 return best;
978 }
979 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
980
981 /*
982 * If the basic or extended CPUID leaf requested is higher than the
983 * maximum supported basic or extended leaf, respectively, then it is
984 * out of range.
985 */
cpuid_function_in_range(struct kvm_vcpu * vcpu,u32 function)986 static bool cpuid_function_in_range(struct kvm_vcpu *vcpu, u32 function)
987 {
988 struct kvm_cpuid_entry2 *max;
989
990 max = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
991 return max && function <= max->eax;
992 }
993
kvm_cpuid(struct kvm_vcpu * vcpu,u32 * eax,u32 * ebx,u32 * ecx,u32 * edx,bool check_limit)994 bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
995 u32 *ecx, u32 *edx, bool check_limit)
996 {
997 u32 function = *eax, index = *ecx;
998 struct kvm_cpuid_entry2 *entry;
999 struct kvm_cpuid_entry2 *max;
1000 bool found;
1001
1002 entry = kvm_find_cpuid_entry(vcpu, function, index);
1003 found = entry;
1004 /*
1005 * Intel CPUID semantics treats any query for an out-of-range
1006 * leaf as if the highest basic leaf (i.e. CPUID.0H:EAX) were
1007 * requested. AMD CPUID semantics returns all zeroes for any
1008 * undefined leaf, whether or not the leaf is in range.
1009 */
1010 if (!entry && check_limit && !guest_cpuid_is_amd(vcpu) &&
1011 !cpuid_function_in_range(vcpu, function)) {
1012 max = kvm_find_cpuid_entry(vcpu, 0, 0);
1013 if (max) {
1014 function = max->eax;
1015 entry = kvm_find_cpuid_entry(vcpu, function, index);
1016 }
1017 }
1018 if (entry) {
1019 *eax = entry->eax;
1020 *ebx = entry->ebx;
1021 *ecx = entry->ecx;
1022 *edx = entry->edx;
1023 } else {
1024 *eax = *ebx = *ecx = *edx = 0;
1025 /*
1026 * When leaf 0BH or 1FH is defined, CL is pass-through
1027 * and EDX is always the x2APIC ID, even for undefined
1028 * subleaves. Index 1 will exist iff the leaf is
1029 * implemented, so we pass through CL iff leaf 1
1030 * exists. EDX can be copied from any existing index.
1031 */
1032 if (function == 0xb || function == 0x1f) {
1033 entry = kvm_find_cpuid_entry(vcpu, function, 1);
1034 if (entry) {
1035 *ecx = index & 0xff;
1036 *edx = entry->edx;
1037 }
1038 }
1039 }
1040 trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, found);
1041 return found;
1042 }
1043 EXPORT_SYMBOL_GPL(kvm_cpuid);
1044
kvm_emulate_cpuid(struct kvm_vcpu * vcpu)1045 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
1046 {
1047 u32 eax, ebx, ecx, edx;
1048
1049 if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
1050 return 1;
1051
1052 eax = kvm_rax_read(vcpu);
1053 ecx = kvm_rcx_read(vcpu);
1054 kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true);
1055 kvm_rax_write(vcpu, eax);
1056 kvm_rbx_write(vcpu, ebx);
1057 kvm_rcx_write(vcpu, ecx);
1058 kvm_rdx_write(vcpu, edx);
1059 return kvm_skip_emulated_instruction(vcpu);
1060 }
1061 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
1062