1 /*
2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include "en.h"
34 #include "en/port.h"
35 #include "en/xsk/umem.h"
36 #include "lib/clock.h"
37
mlx5e_ethtool_get_drvinfo(struct mlx5e_priv * priv,struct ethtool_drvinfo * drvinfo)38 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
39 struct ethtool_drvinfo *drvinfo)
40 {
41 struct mlx5_core_dev *mdev = priv->mdev;
42
43 strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
44 strlcpy(drvinfo->version, DRIVER_VERSION,
45 sizeof(drvinfo->version));
46 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
47 "%d.%d.%04d (%.16s)",
48 fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
49 mdev->board_id);
50 strlcpy(drvinfo->bus_info, dev_name(mdev->device),
51 sizeof(drvinfo->bus_info));
52 }
53
mlx5e_get_drvinfo(struct net_device * dev,struct ethtool_drvinfo * drvinfo)54 static void mlx5e_get_drvinfo(struct net_device *dev,
55 struct ethtool_drvinfo *drvinfo)
56 {
57 struct mlx5e_priv *priv = netdev_priv(dev);
58
59 mlx5e_ethtool_get_drvinfo(priv, drvinfo);
60 }
61
62 struct ptys2ethtool_config {
63 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
64 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
65 };
66
67 static
68 struct ptys2ethtool_config ptys2legacy_ethtool_table[MLX5E_LINK_MODES_NUMBER];
69 static
70 struct ptys2ethtool_config ptys2ext_ethtool_table[MLX5E_EXT_LINK_MODES_NUMBER];
71
72 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, table, ...) \
73 ({ \
74 struct ptys2ethtool_config *cfg; \
75 const unsigned int modes[] = { __VA_ARGS__ }; \
76 unsigned int i, bit, idx; \
77 cfg = &ptys2##table##_ethtool_table[reg_]; \
78 bitmap_zero(cfg->supported, \
79 __ETHTOOL_LINK_MODE_MASK_NBITS); \
80 bitmap_zero(cfg->advertised, \
81 __ETHTOOL_LINK_MODE_MASK_NBITS); \
82 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) { \
83 bit = modes[i] % 64; \
84 idx = modes[i] / 64; \
85 __set_bit(bit, &cfg->supported[idx]); \
86 __set_bit(bit, &cfg->advertised[idx]); \
87 } \
88 })
89
mlx5e_build_ptys2ethtool_map(void)90 void mlx5e_build_ptys2ethtool_map(void)
91 {
92 memset(ptys2legacy_ethtool_table, 0, sizeof(ptys2legacy_ethtool_table));
93 memset(ptys2ext_ethtool_table, 0, sizeof(ptys2ext_ethtool_table));
94 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, legacy,
95 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
96 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, legacy,
97 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
98 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, legacy,
99 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
100 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, legacy,
101 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
102 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, legacy,
103 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
104 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, legacy,
105 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
106 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, legacy,
107 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
108 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, legacy,
109 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
110 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, legacy,
111 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
112 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, legacy,
113 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
114 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, legacy,
115 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
116 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, legacy,
117 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
118 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, legacy,
119 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
120 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, legacy,
121 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
122 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, legacy,
123 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
124 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, legacy,
125 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
126 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, legacy,
127 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
128 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, legacy,
129 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
130 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, legacy,
131 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
132 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, legacy,
133 ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
134 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, legacy,
135 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
136 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, legacy,
137 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
138 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, legacy,
139 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
140 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, legacy,
141 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
142 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, legacy,
143 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
144 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_SGMII_100M, ext,
145 ETHTOOL_LINK_MODE_100baseT_Full_BIT);
146 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_X_SGMII, ext,
147 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
148 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
149 ETHTOOL_LINK_MODE_1000baseX_Full_BIT);
150 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_5GBASE_R, ext,
151 ETHTOOL_LINK_MODE_5000baseT_Full_BIT);
152 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_XFI_XAUI_1, ext,
153 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
154 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
155 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
156 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
157 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
158 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
159 ETHTOOL_LINK_MODE_10000baseER_Full_BIT);
160 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_XLAUI_4_XLPPI_4, ext,
161 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
162 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
163 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
164 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
165 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GAUI_1_25GBASE_CR_KR, ext,
166 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
167 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
168 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
169 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2,
170 ext,
171 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
172 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
173 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
174 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR, ext,
175 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
176 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
177 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
178 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
179 ETHTOOL_LINK_MODE_50000baseDR_Full_BIT);
180 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_CAUI_4_100GBASE_CR4_KR4, ext,
181 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
182 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
183 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
184 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
185 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_2_100GBASE_CR2_KR2, ext,
186 ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT,
187 ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT,
188 ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT,
189 ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
190 ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT);
191 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_4_200GBASE_CR4_KR4, ext,
192 ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT,
193 ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT,
194 ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
195 ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT,
196 ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT);
197 }
198
mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev * mdev,struct ptys2ethtool_config ** arr,u32 * size)199 static void mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev *mdev,
200 struct ptys2ethtool_config **arr,
201 u32 *size)
202 {
203 bool ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);
204
205 *arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
206 *size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
207 ARRAY_SIZE(ptys2legacy_ethtool_table);
208 }
209
210 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
211
212 struct pflag_desc {
213 char name[ETH_GSTRING_LEN];
214 mlx5e_pflag_handler handler;
215 };
216
217 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS];
218
mlx5e_ethtool_get_sset_count(struct mlx5e_priv * priv,int sset)219 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
220 {
221 int i, num_stats = 0;
222
223 switch (sset) {
224 case ETH_SS_STATS:
225 for (i = 0; i < mlx5e_num_stats_grps; i++)
226 num_stats += mlx5e_stats_grps[i].get_num_stats(priv);
227 return num_stats;
228 case ETH_SS_PRIV_FLAGS:
229 return MLX5E_NUM_PFLAGS;
230 case ETH_SS_TEST:
231 return mlx5e_self_test_num(priv);
232 /* fallthrough */
233 default:
234 return -EOPNOTSUPP;
235 }
236 }
237
mlx5e_get_sset_count(struct net_device * dev,int sset)238 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
239 {
240 struct mlx5e_priv *priv = netdev_priv(dev);
241
242 return mlx5e_ethtool_get_sset_count(priv, sset);
243 }
244
mlx5e_fill_stats_strings(struct mlx5e_priv * priv,u8 * data)245 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, u8 *data)
246 {
247 int i, idx = 0;
248
249 for (i = 0; i < mlx5e_num_stats_grps; i++)
250 idx = mlx5e_stats_grps[i].fill_strings(priv, data, idx);
251 }
252
mlx5e_ethtool_get_strings(struct mlx5e_priv * priv,u32 stringset,u8 * data)253 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
254 {
255 int i;
256
257 switch (stringset) {
258 case ETH_SS_PRIV_FLAGS:
259 for (i = 0; i < MLX5E_NUM_PFLAGS; i++)
260 strcpy(data + i * ETH_GSTRING_LEN,
261 mlx5e_priv_flags[i].name);
262 break;
263
264 case ETH_SS_TEST:
265 for (i = 0; i < mlx5e_self_test_num(priv); i++)
266 strcpy(data + i * ETH_GSTRING_LEN,
267 mlx5e_self_tests[i]);
268 break;
269
270 case ETH_SS_STATS:
271 mlx5e_fill_stats_strings(priv, data);
272 break;
273 }
274 }
275
mlx5e_get_strings(struct net_device * dev,u32 stringset,u8 * data)276 static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
277 {
278 struct mlx5e_priv *priv = netdev_priv(dev);
279
280 mlx5e_ethtool_get_strings(priv, stringset, data);
281 }
282
mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv * priv,struct ethtool_stats * stats,u64 * data)283 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
284 struct ethtool_stats *stats, u64 *data)
285 {
286 int i, idx = 0;
287
288 mutex_lock(&priv->state_lock);
289 mlx5e_update_stats(priv);
290 mutex_unlock(&priv->state_lock);
291
292 for (i = 0; i < mlx5e_num_stats_grps; i++)
293 idx = mlx5e_stats_grps[i].fill_stats(priv, data, idx);
294 }
295
mlx5e_get_ethtool_stats(struct net_device * dev,struct ethtool_stats * stats,u64 * data)296 static void mlx5e_get_ethtool_stats(struct net_device *dev,
297 struct ethtool_stats *stats,
298 u64 *data)
299 {
300 struct mlx5e_priv *priv = netdev_priv(dev);
301
302 mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
303 }
304
mlx5e_ethtool_get_ringparam(struct mlx5e_priv * priv,struct ethtool_ringparam * param)305 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
306 struct ethtool_ringparam *param)
307 {
308 param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
309 param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
310 param->rx_pending = 1 << priv->channels.params.log_rq_mtu_frames;
311 param->tx_pending = 1 << priv->channels.params.log_sq_size;
312 }
313
mlx5e_get_ringparam(struct net_device * dev,struct ethtool_ringparam * param)314 static void mlx5e_get_ringparam(struct net_device *dev,
315 struct ethtool_ringparam *param)
316 {
317 struct mlx5e_priv *priv = netdev_priv(dev);
318
319 mlx5e_ethtool_get_ringparam(priv, param);
320 }
321
mlx5e_ethtool_set_ringparam(struct mlx5e_priv * priv,struct ethtool_ringparam * param)322 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
323 struct ethtool_ringparam *param)
324 {
325 struct mlx5e_channels new_channels = {};
326 u8 log_rq_size;
327 u8 log_sq_size;
328 int err = 0;
329
330 if (param->rx_jumbo_pending) {
331 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
332 __func__);
333 return -EINVAL;
334 }
335 if (param->rx_mini_pending) {
336 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
337 __func__);
338 return -EINVAL;
339 }
340
341 if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
342 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
343 __func__, param->rx_pending,
344 1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
345 return -EINVAL;
346 }
347
348 if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
349 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
350 __func__, param->tx_pending,
351 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
352 return -EINVAL;
353 }
354
355 log_rq_size = order_base_2(param->rx_pending);
356 log_sq_size = order_base_2(param->tx_pending);
357
358 if (log_rq_size == priv->channels.params.log_rq_mtu_frames &&
359 log_sq_size == priv->channels.params.log_sq_size)
360 return 0;
361
362 mutex_lock(&priv->state_lock);
363
364 new_channels.params = priv->channels.params;
365 new_channels.params.log_rq_mtu_frames = log_rq_size;
366 new_channels.params.log_sq_size = log_sq_size;
367
368 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
369 priv->channels.params = new_channels.params;
370 goto unlock;
371 }
372
373 err = mlx5e_safe_switch_channels(priv, &new_channels, NULL);
374
375 unlock:
376 mutex_unlock(&priv->state_lock);
377
378 return err;
379 }
380
mlx5e_set_ringparam(struct net_device * dev,struct ethtool_ringparam * param)381 static int mlx5e_set_ringparam(struct net_device *dev,
382 struct ethtool_ringparam *param)
383 {
384 struct mlx5e_priv *priv = netdev_priv(dev);
385
386 return mlx5e_ethtool_set_ringparam(priv, param);
387 }
388
mlx5e_ethtool_get_channels(struct mlx5e_priv * priv,struct ethtool_channels * ch)389 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
390 struct ethtool_channels *ch)
391 {
392 mutex_lock(&priv->state_lock);
393
394 ch->max_combined = priv->max_nch;
395 ch->combined_count = priv->channels.params.num_channels;
396 if (priv->xsk.refcnt) {
397 /* The upper half are XSK queues. */
398 ch->max_combined *= 2;
399 ch->combined_count *= 2;
400 }
401
402 mutex_unlock(&priv->state_lock);
403 }
404
mlx5e_get_channels(struct net_device * dev,struct ethtool_channels * ch)405 static void mlx5e_get_channels(struct net_device *dev,
406 struct ethtool_channels *ch)
407 {
408 struct mlx5e_priv *priv = netdev_priv(dev);
409
410 mlx5e_ethtool_get_channels(priv, ch);
411 }
412
mlx5e_ethtool_set_channels(struct mlx5e_priv * priv,struct ethtool_channels * ch)413 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
414 struct ethtool_channels *ch)
415 {
416 struct mlx5e_params *cur_params = &priv->channels.params;
417 unsigned int count = ch->combined_count;
418 struct mlx5e_channels new_channels = {};
419 bool arfs_enabled;
420 int err = 0;
421
422 if (!count) {
423 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
424 __func__);
425 return -EINVAL;
426 }
427
428 if (cur_params->num_channels == count)
429 return 0;
430
431 mutex_lock(&priv->state_lock);
432
433 /* Don't allow changing the number of channels if there is an active
434 * XSK, because the numeration of the XSK and regular RQs will change.
435 */
436 if (priv->xsk.refcnt) {
437 err = -EINVAL;
438 netdev_err(priv->netdev, "%s: AF_XDP is active, cannot change the number of channels\n",
439 __func__);
440 goto out;
441 }
442
443 new_channels.params = priv->channels.params;
444 new_channels.params.num_channels = count;
445
446 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
447 *cur_params = new_channels.params;
448 if (!netif_is_rxfh_configured(priv->netdev))
449 mlx5e_build_default_indir_rqt(priv->rss_params.indirection_rqt,
450 MLX5E_INDIR_RQT_SIZE, count);
451 goto out;
452 }
453
454 arfs_enabled = priv->netdev->features & NETIF_F_NTUPLE;
455 if (arfs_enabled)
456 mlx5e_arfs_disable(priv);
457
458 if (!netif_is_rxfh_configured(priv->netdev))
459 mlx5e_build_default_indir_rqt(priv->rss_params.indirection_rqt,
460 MLX5E_INDIR_RQT_SIZE, count);
461
462 /* Switch to new channels, set new parameters and close old ones */
463 err = mlx5e_safe_switch_channels(priv, &new_channels, NULL);
464
465 if (arfs_enabled) {
466 int err2 = mlx5e_arfs_enable(priv);
467
468 if (err2)
469 netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
470 __func__, err2);
471 }
472
473 out:
474 mutex_unlock(&priv->state_lock);
475
476 return err;
477 }
478
mlx5e_set_channels(struct net_device * dev,struct ethtool_channels * ch)479 static int mlx5e_set_channels(struct net_device *dev,
480 struct ethtool_channels *ch)
481 {
482 struct mlx5e_priv *priv = netdev_priv(dev);
483
484 return mlx5e_ethtool_set_channels(priv, ch);
485 }
486
mlx5e_ethtool_get_coalesce(struct mlx5e_priv * priv,struct ethtool_coalesce * coal)487 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
488 struct ethtool_coalesce *coal)
489 {
490 struct dim_cq_moder *rx_moder, *tx_moder;
491
492 if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
493 return -EOPNOTSUPP;
494
495 rx_moder = &priv->channels.params.rx_cq_moderation;
496 coal->rx_coalesce_usecs = rx_moder->usec;
497 coal->rx_max_coalesced_frames = rx_moder->pkts;
498 coal->use_adaptive_rx_coalesce = priv->channels.params.rx_dim_enabled;
499
500 tx_moder = &priv->channels.params.tx_cq_moderation;
501 coal->tx_coalesce_usecs = tx_moder->usec;
502 coal->tx_max_coalesced_frames = tx_moder->pkts;
503 coal->use_adaptive_tx_coalesce = priv->channels.params.tx_dim_enabled;
504
505 return 0;
506 }
507
mlx5e_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * coal)508 static int mlx5e_get_coalesce(struct net_device *netdev,
509 struct ethtool_coalesce *coal)
510 {
511 struct mlx5e_priv *priv = netdev_priv(netdev);
512
513 return mlx5e_ethtool_get_coalesce(priv, coal);
514 }
515
516 #define MLX5E_MAX_COAL_TIME MLX5_MAX_CQ_PERIOD
517 #define MLX5E_MAX_COAL_FRAMES MLX5_MAX_CQ_COUNT
518
519 static void
mlx5e_set_priv_channels_coalesce(struct mlx5e_priv * priv,struct ethtool_coalesce * coal)520 mlx5e_set_priv_channels_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
521 {
522 struct mlx5_core_dev *mdev = priv->mdev;
523 int tc;
524 int i;
525
526 for (i = 0; i < priv->channels.num; ++i) {
527 struct mlx5e_channel *c = priv->channels.c[i];
528
529 for (tc = 0; tc < c->num_tc; tc++) {
530 mlx5_core_modify_cq_moderation(mdev,
531 &c->sq[tc].cq.mcq,
532 coal->tx_coalesce_usecs,
533 coal->tx_max_coalesced_frames);
534 }
535
536 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
537 coal->rx_coalesce_usecs,
538 coal->rx_max_coalesced_frames);
539 }
540 }
541
mlx5e_ethtool_set_coalesce(struct mlx5e_priv * priv,struct ethtool_coalesce * coal)542 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
543 struct ethtool_coalesce *coal)
544 {
545 struct dim_cq_moder *rx_moder, *tx_moder;
546 struct mlx5_core_dev *mdev = priv->mdev;
547 struct mlx5e_channels new_channels = {};
548 int err = 0;
549 bool reset;
550
551 if (!MLX5_CAP_GEN(mdev, cq_moderation))
552 return -EOPNOTSUPP;
553
554 if (coal->tx_coalesce_usecs > MLX5E_MAX_COAL_TIME ||
555 coal->rx_coalesce_usecs > MLX5E_MAX_COAL_TIME) {
556 netdev_info(priv->netdev, "%s: maximum coalesce time supported is %lu usecs\n",
557 __func__, MLX5E_MAX_COAL_TIME);
558 return -ERANGE;
559 }
560
561 if (coal->tx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES ||
562 coal->rx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES) {
563 netdev_info(priv->netdev, "%s: maximum coalesced frames supported is %lu\n",
564 __func__, MLX5E_MAX_COAL_FRAMES);
565 return -ERANGE;
566 }
567
568 mutex_lock(&priv->state_lock);
569 new_channels.params = priv->channels.params;
570
571 rx_moder = &new_channels.params.rx_cq_moderation;
572 rx_moder->usec = coal->rx_coalesce_usecs;
573 rx_moder->pkts = coal->rx_max_coalesced_frames;
574 new_channels.params.rx_dim_enabled = !!coal->use_adaptive_rx_coalesce;
575
576 tx_moder = &new_channels.params.tx_cq_moderation;
577 tx_moder->usec = coal->tx_coalesce_usecs;
578 tx_moder->pkts = coal->tx_max_coalesced_frames;
579 new_channels.params.tx_dim_enabled = !!coal->use_adaptive_tx_coalesce;
580
581 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
582 priv->channels.params = new_channels.params;
583 goto out;
584 }
585 /* we are opened */
586
587 reset = (!!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled) ||
588 (!!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled);
589
590 if (!reset) {
591 mlx5e_set_priv_channels_coalesce(priv, coal);
592 priv->channels.params = new_channels.params;
593 goto out;
594 }
595
596 err = mlx5e_safe_switch_channels(priv, &new_channels, NULL);
597
598 out:
599 mutex_unlock(&priv->state_lock);
600 return err;
601 }
602
mlx5e_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * coal)603 static int mlx5e_set_coalesce(struct net_device *netdev,
604 struct ethtool_coalesce *coal)
605 {
606 struct mlx5e_priv *priv = netdev_priv(netdev);
607
608 return mlx5e_ethtool_set_coalesce(priv, coal);
609 }
610
ptys2ethtool_supported_link(struct mlx5_core_dev * mdev,unsigned long * supported_modes,u32 eth_proto_cap)611 static void ptys2ethtool_supported_link(struct mlx5_core_dev *mdev,
612 unsigned long *supported_modes,
613 u32 eth_proto_cap)
614 {
615 unsigned long proto_cap = eth_proto_cap;
616 struct ptys2ethtool_config *table;
617 u32 max_size;
618 int proto;
619
620 mlx5e_ethtool_get_speed_arr(mdev, &table, &max_size);
621 for_each_set_bit(proto, &proto_cap, max_size)
622 bitmap_or(supported_modes, supported_modes,
623 table[proto].supported,
624 __ETHTOOL_LINK_MODE_MASK_NBITS);
625 }
626
ptys2ethtool_adver_link(unsigned long * advertising_modes,u32 eth_proto_cap,bool ext)627 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
628 u32 eth_proto_cap, bool ext)
629 {
630 unsigned long proto_cap = eth_proto_cap;
631 struct ptys2ethtool_config *table;
632 u32 max_size;
633 int proto;
634
635 table = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
636 max_size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
637 ARRAY_SIZE(ptys2legacy_ethtool_table);
638
639 for_each_set_bit(proto, &proto_cap, max_size)
640 bitmap_or(advertising_modes, advertising_modes,
641 table[proto].advertised,
642 __ETHTOOL_LINK_MODE_MASK_NBITS);
643 }
644
645 static const u32 pplm_fec_2_ethtool[] = {
646 [MLX5E_FEC_NOFEC] = ETHTOOL_FEC_OFF,
647 [MLX5E_FEC_FIRECODE] = ETHTOOL_FEC_BASER,
648 [MLX5E_FEC_RS_528_514] = ETHTOOL_FEC_RS,
649 };
650
pplm2ethtool_fec(u_long fec_mode,unsigned long size)651 static u32 pplm2ethtool_fec(u_long fec_mode, unsigned long size)
652 {
653 int mode = 0;
654
655 if (!fec_mode)
656 return ETHTOOL_FEC_AUTO;
657
658 mode = find_first_bit(&fec_mode, size);
659
660 if (mode < ARRAY_SIZE(pplm_fec_2_ethtool))
661 return pplm_fec_2_ethtool[mode];
662
663 return 0;
664 }
665
666 /* we use ETHTOOL_FEC_* offset and apply it to ETHTOOL_LINK_MODE_FEC_*_BIT */
ethtool_fec2ethtool_caps(u_long ethtool_fec_code)667 static u32 ethtool_fec2ethtool_caps(u_long ethtool_fec_code)
668 {
669 u32 offset;
670
671 offset = find_first_bit(ðtool_fec_code, sizeof(u32));
672 offset -= ETHTOOL_FEC_OFF_BIT;
673 offset += ETHTOOL_LINK_MODE_FEC_NONE_BIT;
674
675 return offset;
676 }
677
get_fec_supported_advertised(struct mlx5_core_dev * dev,struct ethtool_link_ksettings * link_ksettings)678 static int get_fec_supported_advertised(struct mlx5_core_dev *dev,
679 struct ethtool_link_ksettings *link_ksettings)
680 {
681 u_long fec_caps = 0;
682 u32 active_fec = 0;
683 u32 offset;
684 u32 bitn;
685 int err;
686
687 err = mlx5e_get_fec_caps(dev, (u8 *)&fec_caps);
688 if (err)
689 return (err == -EOPNOTSUPP) ? 0 : err;
690
691 err = mlx5e_get_fec_mode(dev, &active_fec, NULL);
692 if (err)
693 return err;
694
695 for_each_set_bit(bitn, &fec_caps, ARRAY_SIZE(pplm_fec_2_ethtool)) {
696 u_long ethtool_bitmask = pplm_fec_2_ethtool[bitn];
697
698 offset = ethtool_fec2ethtool_caps(ethtool_bitmask);
699 __set_bit(offset, link_ksettings->link_modes.supported);
700 }
701
702 active_fec = pplm2ethtool_fec(active_fec, sizeof(u32) * BITS_PER_BYTE);
703 offset = ethtool_fec2ethtool_caps(active_fec);
704 __set_bit(offset, link_ksettings->link_modes.advertising);
705
706 return 0;
707 }
708
ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings * link_ksettings,u32 eth_proto_cap,u8 connector_type,bool ext)709 static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings *link_ksettings,
710 u32 eth_proto_cap,
711 u8 connector_type, bool ext)
712 {
713 if ((!connector_type && !ext) || connector_type >= MLX5E_CONNECTOR_TYPE_NUMBER) {
714 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
715 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
716 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
717 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
718 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
719 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
720 ethtool_link_ksettings_add_link_mode(link_ksettings,
721 supported,
722 FIBRE);
723 ethtool_link_ksettings_add_link_mode(link_ksettings,
724 advertising,
725 FIBRE);
726 }
727
728 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
729 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
730 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
731 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
732 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
733 ethtool_link_ksettings_add_link_mode(link_ksettings,
734 supported,
735 Backplane);
736 ethtool_link_ksettings_add_link_mode(link_ksettings,
737 advertising,
738 Backplane);
739 }
740 return;
741 }
742
743 switch (connector_type) {
744 case MLX5E_PORT_TP:
745 ethtool_link_ksettings_add_link_mode(link_ksettings,
746 supported, TP);
747 ethtool_link_ksettings_add_link_mode(link_ksettings,
748 advertising, TP);
749 break;
750 case MLX5E_PORT_AUI:
751 ethtool_link_ksettings_add_link_mode(link_ksettings,
752 supported, AUI);
753 ethtool_link_ksettings_add_link_mode(link_ksettings,
754 advertising, AUI);
755 break;
756 case MLX5E_PORT_BNC:
757 ethtool_link_ksettings_add_link_mode(link_ksettings,
758 supported, BNC);
759 ethtool_link_ksettings_add_link_mode(link_ksettings,
760 advertising, BNC);
761 break;
762 case MLX5E_PORT_MII:
763 ethtool_link_ksettings_add_link_mode(link_ksettings,
764 supported, MII);
765 ethtool_link_ksettings_add_link_mode(link_ksettings,
766 advertising, MII);
767 break;
768 case MLX5E_PORT_FIBRE:
769 ethtool_link_ksettings_add_link_mode(link_ksettings,
770 supported, FIBRE);
771 ethtool_link_ksettings_add_link_mode(link_ksettings,
772 advertising, FIBRE);
773 break;
774 case MLX5E_PORT_DA:
775 ethtool_link_ksettings_add_link_mode(link_ksettings,
776 supported, Backplane);
777 ethtool_link_ksettings_add_link_mode(link_ksettings,
778 advertising, Backplane);
779 break;
780 case MLX5E_PORT_NONE:
781 case MLX5E_PORT_OTHER:
782 default:
783 break;
784 }
785 }
786
get_speed_duplex(struct net_device * netdev,u32 eth_proto_oper,bool force_legacy,struct ethtool_link_ksettings * link_ksettings)787 static void get_speed_duplex(struct net_device *netdev,
788 u32 eth_proto_oper, bool force_legacy,
789 struct ethtool_link_ksettings *link_ksettings)
790 {
791 struct mlx5e_priv *priv = netdev_priv(netdev);
792 u32 speed = SPEED_UNKNOWN;
793 u8 duplex = DUPLEX_UNKNOWN;
794
795 if (!netif_carrier_ok(netdev))
796 goto out;
797
798 speed = mlx5e_port_ptys2speed(priv->mdev, eth_proto_oper, force_legacy);
799 if (!speed) {
800 speed = SPEED_UNKNOWN;
801 goto out;
802 }
803
804 duplex = DUPLEX_FULL;
805
806 out:
807 link_ksettings->base.speed = speed;
808 link_ksettings->base.duplex = duplex;
809 }
810
get_supported(struct mlx5_core_dev * mdev,u32 eth_proto_cap,struct ethtool_link_ksettings * link_ksettings)811 static void get_supported(struct mlx5_core_dev *mdev, u32 eth_proto_cap,
812 struct ethtool_link_ksettings *link_ksettings)
813 {
814 unsigned long *supported = link_ksettings->link_modes.supported;
815 ptys2ethtool_supported_link(mdev, supported, eth_proto_cap);
816
817 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
818 }
819
get_advertising(u32 eth_proto_cap,u8 tx_pause,u8 rx_pause,struct ethtool_link_ksettings * link_ksettings,bool ext)820 static void get_advertising(u32 eth_proto_cap, u8 tx_pause, u8 rx_pause,
821 struct ethtool_link_ksettings *link_ksettings,
822 bool ext)
823 {
824 unsigned long *advertising = link_ksettings->link_modes.advertising;
825 ptys2ethtool_adver_link(advertising, eth_proto_cap, ext);
826
827 if (rx_pause)
828 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
829 if (tx_pause ^ rx_pause)
830 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
831 }
832
833 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
834 [MLX5E_PORT_UNKNOWN] = PORT_OTHER,
835 [MLX5E_PORT_NONE] = PORT_NONE,
836 [MLX5E_PORT_TP] = PORT_TP,
837 [MLX5E_PORT_AUI] = PORT_AUI,
838 [MLX5E_PORT_BNC] = PORT_BNC,
839 [MLX5E_PORT_MII] = PORT_MII,
840 [MLX5E_PORT_FIBRE] = PORT_FIBRE,
841 [MLX5E_PORT_DA] = PORT_DA,
842 [MLX5E_PORT_OTHER] = PORT_OTHER,
843 };
844
get_connector_port(u32 eth_proto,u8 connector_type,bool ext)845 static u8 get_connector_port(u32 eth_proto, u8 connector_type, bool ext)
846 {
847 if ((connector_type || ext) && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
848 return ptys2connector_type[connector_type];
849
850 if (eth_proto &
851 (MLX5E_PROT_MASK(MLX5E_10GBASE_SR) |
852 MLX5E_PROT_MASK(MLX5E_40GBASE_SR4) |
853 MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
854 MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
855 return PORT_FIBRE;
856 }
857
858 if (eth_proto &
859 (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
860 MLX5E_PROT_MASK(MLX5E_10GBASE_CR) |
861 MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
862 return PORT_DA;
863 }
864
865 if (eth_proto &
866 (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
867 MLX5E_PROT_MASK(MLX5E_10GBASE_KR) |
868 MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
869 MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
870 return PORT_NONE;
871 }
872
873 return PORT_OTHER;
874 }
875
get_lp_advertising(struct mlx5_core_dev * mdev,u32 eth_proto_lp,struct ethtool_link_ksettings * link_ksettings)876 static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp,
877 struct ethtool_link_ksettings *link_ksettings)
878 {
879 unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
880 bool ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);
881
882 ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);
883 }
884
mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv * priv,struct ethtool_link_ksettings * link_ksettings)885 int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
886 struct ethtool_link_ksettings *link_ksettings)
887 {
888 struct mlx5_core_dev *mdev = priv->mdev;
889 u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
890 u32 rx_pause = 0;
891 u32 tx_pause = 0;
892 u32 eth_proto_cap;
893 u32 eth_proto_admin;
894 u32 eth_proto_lp;
895 u32 eth_proto_oper;
896 u8 an_disable_admin;
897 u8 an_status;
898 u8 connector_type;
899 bool admin_ext;
900 bool ext;
901 int err;
902
903 err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
904 if (err) {
905 netdev_err(priv->netdev, "%s: query port ptys failed: %d\n",
906 __func__, err);
907 goto err_query_regs;
908 }
909 ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);
910 eth_proto_cap = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
911 eth_proto_capability);
912 eth_proto_admin = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
913 eth_proto_admin);
914 /* Fields: eth_proto_admin and ext_eth_proto_admin are
915 * mutually exclusive. Hence try reading legacy advertising
916 * when extended advertising is zero.
917 * admin_ext indicates which proto_admin (ext vs. legacy)
918 * should be read and interpreted
919 */
920 admin_ext = ext;
921 if (ext && !eth_proto_admin) {
922 eth_proto_admin = MLX5_GET_ETH_PROTO(ptys_reg, out, false,
923 eth_proto_admin);
924 admin_ext = false;
925 }
926
927 eth_proto_oper = MLX5_GET_ETH_PROTO(ptys_reg, out, admin_ext,
928 eth_proto_oper);
929 eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
930 an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
931 an_status = MLX5_GET(ptys_reg, out, an_status);
932 connector_type = MLX5_GET(ptys_reg, out, connector_type);
933
934 mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
935
936 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
937 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
938
939 get_supported(mdev, eth_proto_cap, link_ksettings);
940 get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings,
941 admin_ext);
942 get_speed_duplex(priv->netdev, eth_proto_oper, !admin_ext,
943 link_ksettings);
944
945 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
946
947 link_ksettings->base.port = get_connector_port(eth_proto_oper,
948 connector_type, ext);
949 ptys2ethtool_supported_advertised_port(link_ksettings, eth_proto_admin,
950 connector_type, ext);
951 get_lp_advertising(mdev, eth_proto_lp, link_ksettings);
952
953 if (an_status == MLX5_AN_COMPLETE)
954 ethtool_link_ksettings_add_link_mode(link_ksettings,
955 lp_advertising, Autoneg);
956
957 link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
958 AUTONEG_ENABLE;
959 ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
960 Autoneg);
961
962 err = get_fec_supported_advertised(mdev, link_ksettings);
963 if (err) {
964 netdev_dbg(priv->netdev, "%s: FEC caps query failed: %d\n",
965 __func__, err);
966 err = 0; /* don't fail caps query because of FEC error */
967 }
968
969 if (!an_disable_admin)
970 ethtool_link_ksettings_add_link_mode(link_ksettings,
971 advertising, Autoneg);
972
973 err_query_regs:
974 return err;
975 }
976
mlx5e_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * link_ksettings)977 static int mlx5e_get_link_ksettings(struct net_device *netdev,
978 struct ethtool_link_ksettings *link_ksettings)
979 {
980 struct mlx5e_priv *priv = netdev_priv(netdev);
981
982 return mlx5e_ethtool_get_link_ksettings(priv, link_ksettings);
983 }
984
mlx5e_ethtool2ptys_adver_link(const unsigned long * link_modes)985 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
986 {
987 u32 i, ptys_modes = 0;
988
989 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
990 if (*ptys2legacy_ethtool_table[i].advertised == 0)
991 continue;
992 if (bitmap_intersects(ptys2legacy_ethtool_table[i].advertised,
993 link_modes,
994 __ETHTOOL_LINK_MODE_MASK_NBITS))
995 ptys_modes |= MLX5E_PROT_MASK(i);
996 }
997
998 return ptys_modes;
999 }
1000
mlx5e_ethtool2ptys_ext_adver_link(const unsigned long * link_modes)1001 static u32 mlx5e_ethtool2ptys_ext_adver_link(const unsigned long *link_modes)
1002 {
1003 u32 i, ptys_modes = 0;
1004 unsigned long modes[2];
1005
1006 for (i = 0; i < MLX5E_EXT_LINK_MODES_NUMBER; ++i) {
1007 if (*ptys2ext_ethtool_table[i].advertised == 0)
1008 continue;
1009 memset(modes, 0, sizeof(modes));
1010 bitmap_and(modes, ptys2ext_ethtool_table[i].advertised,
1011 link_modes, __ETHTOOL_LINK_MODE_MASK_NBITS);
1012
1013 if (modes[0] == ptys2ext_ethtool_table[i].advertised[0] &&
1014 modes[1] == ptys2ext_ethtool_table[i].advertised[1])
1015 ptys_modes |= MLX5E_PROT_MASK(i);
1016 }
1017 return ptys_modes;
1018 }
1019
ext_link_mode_requested(const unsigned long * adver)1020 static bool ext_link_mode_requested(const unsigned long *adver)
1021 {
1022 #define MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT ETHTOOL_LINK_MODE_50000baseKR_Full_BIT
1023 int size = __ETHTOOL_LINK_MODE_MASK_NBITS - MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT;
1024 __ETHTOOL_DECLARE_LINK_MODE_MASK(modes) = {0,};
1025
1026 bitmap_set(modes, MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT, size);
1027 return bitmap_intersects(modes, adver, __ETHTOOL_LINK_MODE_MASK_NBITS);
1028 }
1029
ext_requested(u8 autoneg,const unsigned long * adver,bool ext_supported)1030 static bool ext_requested(u8 autoneg, const unsigned long *adver, bool ext_supported)
1031 {
1032 bool ext_link_mode = ext_link_mode_requested(adver);
1033
1034 return autoneg == AUTONEG_ENABLE ? ext_link_mode : ext_supported;
1035 }
1036
mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv * priv,const struct ethtool_link_ksettings * link_ksettings)1037 int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
1038 const struct ethtool_link_ksettings *link_ksettings)
1039 {
1040 struct mlx5_core_dev *mdev = priv->mdev;
1041 struct mlx5e_port_eth_proto eproto;
1042 const unsigned long *adver;
1043 bool an_changes = false;
1044 u8 an_disable_admin;
1045 bool ext_supported;
1046 u8 an_disable_cap;
1047 bool an_disable;
1048 u32 link_modes;
1049 u8 an_status;
1050 u8 autoneg;
1051 u32 speed;
1052 bool ext;
1053 int err;
1054
1055 u32 (*ethtool2ptys_adver_func)(const unsigned long *adver);
1056
1057 adver = link_ksettings->link_modes.advertising;
1058 autoneg = link_ksettings->base.autoneg;
1059 speed = link_ksettings->base.speed;
1060
1061 ext_supported = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);
1062 ext = ext_requested(autoneg, adver, ext_supported);
1063 if (!ext_supported && ext)
1064 return -EOPNOTSUPP;
1065
1066 ethtool2ptys_adver_func = ext ? mlx5e_ethtool2ptys_ext_adver_link :
1067 mlx5e_ethtool2ptys_adver_link;
1068 err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);
1069 if (err) {
1070 netdev_err(priv->netdev, "%s: query port eth proto failed: %d\n",
1071 __func__, err);
1072 goto out;
1073 }
1074 link_modes = autoneg == AUTONEG_ENABLE ? ethtool2ptys_adver_func(adver) :
1075 mlx5e_port_speed2linkmodes(mdev, speed, !ext);
1076
1077 if ((link_modes & MLX5E_PROT_MASK(MLX5E_56GBASE_R4)) &&
1078 autoneg != AUTONEG_ENABLE) {
1079 netdev_err(priv->netdev, "%s: 56G link speed requires autoneg enabled\n",
1080 __func__);
1081 err = -EINVAL;
1082 goto out;
1083 }
1084
1085 link_modes = link_modes & eproto.cap;
1086 if (!link_modes) {
1087 netdev_err(priv->netdev, "%s: Not supported link mode(s) requested",
1088 __func__);
1089 err = -EINVAL;
1090 goto out;
1091 }
1092
1093 mlx5_port_query_eth_autoneg(mdev, &an_status, &an_disable_cap,
1094 &an_disable_admin);
1095
1096 an_disable = autoneg == AUTONEG_DISABLE;
1097 an_changes = ((!an_disable && an_disable_admin) ||
1098 (an_disable && !an_disable_admin));
1099
1100 if (!an_changes && link_modes == eproto.admin)
1101 goto out;
1102
1103 mlx5_port_set_eth_ptys(mdev, an_disable, link_modes, ext);
1104 mlx5_toggle_port_link(mdev);
1105
1106 out:
1107 return err;
1108 }
1109
mlx5e_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * link_ksettings)1110 static int mlx5e_set_link_ksettings(struct net_device *netdev,
1111 const struct ethtool_link_ksettings *link_ksettings)
1112 {
1113 struct mlx5e_priv *priv = netdev_priv(netdev);
1114
1115 return mlx5e_ethtool_set_link_ksettings(priv, link_ksettings);
1116 }
1117
mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv * priv)1118 u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv)
1119 {
1120 return sizeof(priv->rss_params.toeplitz_hash_key);
1121 }
1122
mlx5e_get_rxfh_key_size(struct net_device * netdev)1123 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
1124 {
1125 struct mlx5e_priv *priv = netdev_priv(netdev);
1126
1127 return mlx5e_ethtool_get_rxfh_key_size(priv);
1128 }
1129
mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv * priv)1130 u32 mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv *priv)
1131 {
1132 return MLX5E_INDIR_RQT_SIZE;
1133 }
1134
mlx5e_get_rxfh_indir_size(struct net_device * netdev)1135 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
1136 {
1137 struct mlx5e_priv *priv = netdev_priv(netdev);
1138
1139 return mlx5e_ethtool_get_rxfh_indir_size(priv);
1140 }
1141
mlx5e_get_rxfh(struct net_device * netdev,u32 * indir,u8 * key,u8 * hfunc)1142 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
1143 u8 *hfunc)
1144 {
1145 struct mlx5e_priv *priv = netdev_priv(netdev);
1146 struct mlx5e_rss_params *rss = &priv->rss_params;
1147
1148 if (indir)
1149 memcpy(indir, rss->indirection_rqt,
1150 sizeof(rss->indirection_rqt));
1151
1152 if (key)
1153 memcpy(key, rss->toeplitz_hash_key,
1154 sizeof(rss->toeplitz_hash_key));
1155
1156 if (hfunc)
1157 *hfunc = rss->hfunc;
1158
1159 return 0;
1160 }
1161
mlx5e_set_rxfh(struct net_device * dev,const u32 * indir,const u8 * key,const u8 hfunc)1162 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
1163 const u8 *key, const u8 hfunc)
1164 {
1165 struct mlx5e_priv *priv = netdev_priv(dev);
1166 struct mlx5e_rss_params *rss = &priv->rss_params;
1167 int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
1168 bool hash_changed = false;
1169 void *in;
1170
1171 if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
1172 (hfunc != ETH_RSS_HASH_XOR) &&
1173 (hfunc != ETH_RSS_HASH_TOP))
1174 return -EINVAL;
1175
1176 in = kvzalloc(inlen, GFP_KERNEL);
1177 if (!in)
1178 return -ENOMEM;
1179
1180 mutex_lock(&priv->state_lock);
1181
1182 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != rss->hfunc) {
1183 rss->hfunc = hfunc;
1184 hash_changed = true;
1185 }
1186
1187 if (indir) {
1188 memcpy(rss->indirection_rqt, indir,
1189 sizeof(rss->indirection_rqt));
1190
1191 if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1192 u32 rqtn = priv->indir_rqt.rqtn;
1193 struct mlx5e_redirect_rqt_param rrp = {
1194 .is_rss = true,
1195 {
1196 .rss = {
1197 .hfunc = rss->hfunc,
1198 .channels = &priv->channels,
1199 },
1200 },
1201 };
1202
1203 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
1204 }
1205 }
1206
1207 if (key) {
1208 memcpy(rss->toeplitz_hash_key, key,
1209 sizeof(rss->toeplitz_hash_key));
1210 hash_changed = hash_changed || rss->hfunc == ETH_RSS_HASH_TOP;
1211 }
1212
1213 if (hash_changed)
1214 mlx5e_modify_tirs_hash(priv, in, inlen);
1215
1216 mutex_unlock(&priv->state_lock);
1217
1218 kvfree(in);
1219
1220 return 0;
1221 }
1222
1223 #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC 100
1224 #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC 8000
1225 #define MLX5E_PFC_PREVEN_MINOR_PRECENT 85
1226 #define MLX5E_PFC_PREVEN_TOUT_MIN_MSEC 80
1227 #define MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout) \
1228 max_t(u16, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC, \
1229 (critical_tout * MLX5E_PFC_PREVEN_MINOR_PRECENT) / 100)
1230
mlx5e_get_pfc_prevention_tout(struct net_device * netdev,u16 * pfc_prevention_tout)1231 static int mlx5e_get_pfc_prevention_tout(struct net_device *netdev,
1232 u16 *pfc_prevention_tout)
1233 {
1234 struct mlx5e_priv *priv = netdev_priv(netdev);
1235 struct mlx5_core_dev *mdev = priv->mdev;
1236
1237 if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1238 !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1239 return -EOPNOTSUPP;
1240
1241 return mlx5_query_port_stall_watermark(mdev, pfc_prevention_tout, NULL);
1242 }
1243
mlx5e_set_pfc_prevention_tout(struct net_device * netdev,u16 pfc_preven)1244 static int mlx5e_set_pfc_prevention_tout(struct net_device *netdev,
1245 u16 pfc_preven)
1246 {
1247 struct mlx5e_priv *priv = netdev_priv(netdev);
1248 struct mlx5_core_dev *mdev = priv->mdev;
1249 u16 critical_tout;
1250 u16 minor;
1251
1252 if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1253 !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1254 return -EOPNOTSUPP;
1255
1256 critical_tout = (pfc_preven == PFC_STORM_PREVENTION_AUTO) ?
1257 MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC :
1258 pfc_preven;
1259
1260 if (critical_tout != PFC_STORM_PREVENTION_DISABLE &&
1261 (critical_tout > MLX5E_PFC_PREVEN_TOUT_MAX_MSEC ||
1262 critical_tout < MLX5E_PFC_PREVEN_TOUT_MIN_MSEC)) {
1263 netdev_info(netdev, "%s: pfc prevention tout not in range (%d-%d)\n",
1264 __func__, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC,
1265 MLX5E_PFC_PREVEN_TOUT_MAX_MSEC);
1266 return -EINVAL;
1267 }
1268
1269 minor = MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout);
1270 return mlx5_set_port_stall_watermark(mdev, critical_tout,
1271 minor);
1272 }
1273
mlx5e_get_tunable(struct net_device * dev,const struct ethtool_tunable * tuna,void * data)1274 static int mlx5e_get_tunable(struct net_device *dev,
1275 const struct ethtool_tunable *tuna,
1276 void *data)
1277 {
1278 int err;
1279
1280 switch (tuna->id) {
1281 case ETHTOOL_PFC_PREVENTION_TOUT:
1282 err = mlx5e_get_pfc_prevention_tout(dev, data);
1283 break;
1284 default:
1285 err = -EINVAL;
1286 break;
1287 }
1288
1289 return err;
1290 }
1291
mlx5e_set_tunable(struct net_device * dev,const struct ethtool_tunable * tuna,const void * data)1292 static int mlx5e_set_tunable(struct net_device *dev,
1293 const struct ethtool_tunable *tuna,
1294 const void *data)
1295 {
1296 struct mlx5e_priv *priv = netdev_priv(dev);
1297 int err;
1298
1299 mutex_lock(&priv->state_lock);
1300
1301 switch (tuna->id) {
1302 case ETHTOOL_PFC_PREVENTION_TOUT:
1303 err = mlx5e_set_pfc_prevention_tout(dev, *(u16 *)data);
1304 break;
1305 default:
1306 err = -EINVAL;
1307 break;
1308 }
1309
1310 mutex_unlock(&priv->state_lock);
1311 return err;
1312 }
1313
mlx5e_ethtool_get_pauseparam(struct mlx5e_priv * priv,struct ethtool_pauseparam * pauseparam)1314 void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,
1315 struct ethtool_pauseparam *pauseparam)
1316 {
1317 struct mlx5_core_dev *mdev = priv->mdev;
1318 int err;
1319
1320 err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1321 &pauseparam->tx_pause);
1322 if (err) {
1323 netdev_err(priv->netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1324 __func__, err);
1325 }
1326 }
1327
mlx5e_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pauseparam)1328 static void mlx5e_get_pauseparam(struct net_device *netdev,
1329 struct ethtool_pauseparam *pauseparam)
1330 {
1331 struct mlx5e_priv *priv = netdev_priv(netdev);
1332
1333 mlx5e_ethtool_get_pauseparam(priv, pauseparam);
1334 }
1335
mlx5e_ethtool_set_pauseparam(struct mlx5e_priv * priv,struct ethtool_pauseparam * pauseparam)1336 int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,
1337 struct ethtool_pauseparam *pauseparam)
1338 {
1339 struct mlx5_core_dev *mdev = priv->mdev;
1340 int err;
1341
1342 if (!MLX5_CAP_GEN(mdev, vport_group_manager))
1343 return -EOPNOTSUPP;
1344
1345 if (pauseparam->autoneg)
1346 return -EINVAL;
1347
1348 err = mlx5_set_port_pause(mdev,
1349 pauseparam->rx_pause ? 1 : 0,
1350 pauseparam->tx_pause ? 1 : 0);
1351 if (err) {
1352 netdev_err(priv->netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1353 __func__, err);
1354 }
1355
1356 return err;
1357 }
1358
mlx5e_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pauseparam)1359 static int mlx5e_set_pauseparam(struct net_device *netdev,
1360 struct ethtool_pauseparam *pauseparam)
1361 {
1362 struct mlx5e_priv *priv = netdev_priv(netdev);
1363
1364 return mlx5e_ethtool_set_pauseparam(priv, pauseparam);
1365 }
1366
mlx5e_ethtool_get_ts_info(struct mlx5e_priv * priv,struct ethtool_ts_info * info)1367 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1368 struct ethtool_ts_info *info)
1369 {
1370 struct mlx5_core_dev *mdev = priv->mdev;
1371
1372 info->phc_index = mlx5_clock_get_ptp_index(mdev);
1373
1374 if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
1375 info->phc_index == -1)
1376 return 0;
1377
1378 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1379 SOF_TIMESTAMPING_RX_HARDWARE |
1380 SOF_TIMESTAMPING_RAW_HARDWARE;
1381
1382 info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1383 BIT(HWTSTAMP_TX_ON);
1384
1385 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1386 BIT(HWTSTAMP_FILTER_ALL);
1387
1388 return 0;
1389 }
1390
mlx5e_get_ts_info(struct net_device * dev,struct ethtool_ts_info * info)1391 static int mlx5e_get_ts_info(struct net_device *dev,
1392 struct ethtool_ts_info *info)
1393 {
1394 struct mlx5e_priv *priv = netdev_priv(dev);
1395
1396 return mlx5e_ethtool_get_ts_info(priv, info);
1397 }
1398
mlx5e_get_wol_supported(struct mlx5_core_dev * mdev)1399 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1400 {
1401 __u32 ret = 0;
1402
1403 if (MLX5_CAP_GEN(mdev, wol_g))
1404 ret |= WAKE_MAGIC;
1405
1406 if (MLX5_CAP_GEN(mdev, wol_s))
1407 ret |= WAKE_MAGICSECURE;
1408
1409 if (MLX5_CAP_GEN(mdev, wol_a))
1410 ret |= WAKE_ARP;
1411
1412 if (MLX5_CAP_GEN(mdev, wol_b))
1413 ret |= WAKE_BCAST;
1414
1415 if (MLX5_CAP_GEN(mdev, wol_m))
1416 ret |= WAKE_MCAST;
1417
1418 if (MLX5_CAP_GEN(mdev, wol_u))
1419 ret |= WAKE_UCAST;
1420
1421 if (MLX5_CAP_GEN(mdev, wol_p))
1422 ret |= WAKE_PHY;
1423
1424 return ret;
1425 }
1426
mlx5e_reformat_wol_mode_mlx5_to_linux(u8 mode)1427 static __u32 mlx5e_reformat_wol_mode_mlx5_to_linux(u8 mode)
1428 {
1429 __u32 ret = 0;
1430
1431 if (mode & MLX5_WOL_MAGIC)
1432 ret |= WAKE_MAGIC;
1433
1434 if (mode & MLX5_WOL_SECURED_MAGIC)
1435 ret |= WAKE_MAGICSECURE;
1436
1437 if (mode & MLX5_WOL_ARP)
1438 ret |= WAKE_ARP;
1439
1440 if (mode & MLX5_WOL_BROADCAST)
1441 ret |= WAKE_BCAST;
1442
1443 if (mode & MLX5_WOL_MULTICAST)
1444 ret |= WAKE_MCAST;
1445
1446 if (mode & MLX5_WOL_UNICAST)
1447 ret |= WAKE_UCAST;
1448
1449 if (mode & MLX5_WOL_PHY_ACTIVITY)
1450 ret |= WAKE_PHY;
1451
1452 return ret;
1453 }
1454
mlx5e_reformat_wol_mode_linux_to_mlx5(__u32 mode)1455 static u8 mlx5e_reformat_wol_mode_linux_to_mlx5(__u32 mode)
1456 {
1457 u8 ret = 0;
1458
1459 if (mode & WAKE_MAGIC)
1460 ret |= MLX5_WOL_MAGIC;
1461
1462 if (mode & WAKE_MAGICSECURE)
1463 ret |= MLX5_WOL_SECURED_MAGIC;
1464
1465 if (mode & WAKE_ARP)
1466 ret |= MLX5_WOL_ARP;
1467
1468 if (mode & WAKE_BCAST)
1469 ret |= MLX5_WOL_BROADCAST;
1470
1471 if (mode & WAKE_MCAST)
1472 ret |= MLX5_WOL_MULTICAST;
1473
1474 if (mode & WAKE_UCAST)
1475 ret |= MLX5_WOL_UNICAST;
1476
1477 if (mode & WAKE_PHY)
1478 ret |= MLX5_WOL_PHY_ACTIVITY;
1479
1480 return ret;
1481 }
1482
mlx5e_get_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)1483 static void mlx5e_get_wol(struct net_device *netdev,
1484 struct ethtool_wolinfo *wol)
1485 {
1486 struct mlx5e_priv *priv = netdev_priv(netdev);
1487 struct mlx5_core_dev *mdev = priv->mdev;
1488 u8 mlx5_wol_mode;
1489 int err;
1490
1491 memset(wol, 0, sizeof(*wol));
1492
1493 wol->supported = mlx5e_get_wol_supported(mdev);
1494 if (!wol->supported)
1495 return;
1496
1497 err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1498 if (err)
1499 return;
1500
1501 wol->wolopts = mlx5e_reformat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1502 }
1503
mlx5e_set_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)1504 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1505 {
1506 struct mlx5e_priv *priv = netdev_priv(netdev);
1507 struct mlx5_core_dev *mdev = priv->mdev;
1508 __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1509 u32 mlx5_wol_mode;
1510
1511 if (!wol_supported)
1512 return -EOPNOTSUPP;
1513
1514 if (wol->wolopts & ~wol_supported)
1515 return -EINVAL;
1516
1517 mlx5_wol_mode = mlx5e_reformat_wol_mode_linux_to_mlx5(wol->wolopts);
1518
1519 return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1520 }
1521
mlx5e_get_fecparam(struct net_device * netdev,struct ethtool_fecparam * fecparam)1522 static int mlx5e_get_fecparam(struct net_device *netdev,
1523 struct ethtool_fecparam *fecparam)
1524 {
1525 struct mlx5e_priv *priv = netdev_priv(netdev);
1526 struct mlx5_core_dev *mdev = priv->mdev;
1527 u8 fec_configured = 0;
1528 u32 fec_active = 0;
1529 int err;
1530
1531 err = mlx5e_get_fec_mode(mdev, &fec_active, &fec_configured);
1532
1533 if (err)
1534 return err;
1535
1536 fecparam->active_fec = pplm2ethtool_fec((u_long)fec_active,
1537 sizeof(u32) * BITS_PER_BYTE);
1538
1539 if (!fecparam->active_fec)
1540 return -EOPNOTSUPP;
1541
1542 fecparam->fec = pplm2ethtool_fec((u_long)fec_configured,
1543 sizeof(u8) * BITS_PER_BYTE);
1544
1545 return 0;
1546 }
1547
mlx5e_set_fecparam(struct net_device * netdev,struct ethtool_fecparam * fecparam)1548 static int mlx5e_set_fecparam(struct net_device *netdev,
1549 struct ethtool_fecparam *fecparam)
1550 {
1551 struct mlx5e_priv *priv = netdev_priv(netdev);
1552 struct mlx5_core_dev *mdev = priv->mdev;
1553 u8 fec_policy = 0;
1554 int mode;
1555 int err;
1556
1557 for (mode = 0; mode < ARRAY_SIZE(pplm_fec_2_ethtool); mode++) {
1558 if (!(pplm_fec_2_ethtool[mode] & fecparam->fec))
1559 continue;
1560 fec_policy |= (1 << mode);
1561 break;
1562 }
1563
1564 err = mlx5e_set_fec_mode(mdev, fec_policy);
1565
1566 if (err)
1567 return err;
1568
1569 mlx5_toggle_port_link(mdev);
1570
1571 return 0;
1572 }
1573
mlx5e_get_msglevel(struct net_device * dev)1574 static u32 mlx5e_get_msglevel(struct net_device *dev)
1575 {
1576 return ((struct mlx5e_priv *)netdev_priv(dev))->msglevel;
1577 }
1578
mlx5e_set_msglevel(struct net_device * dev,u32 val)1579 static void mlx5e_set_msglevel(struct net_device *dev, u32 val)
1580 {
1581 ((struct mlx5e_priv *)netdev_priv(dev))->msglevel = val;
1582 }
1583
mlx5e_set_phys_id(struct net_device * dev,enum ethtool_phys_id_state state)1584 static int mlx5e_set_phys_id(struct net_device *dev,
1585 enum ethtool_phys_id_state state)
1586 {
1587 struct mlx5e_priv *priv = netdev_priv(dev);
1588 struct mlx5_core_dev *mdev = priv->mdev;
1589 u16 beacon_duration;
1590
1591 if (!MLX5_CAP_GEN(mdev, beacon_led))
1592 return -EOPNOTSUPP;
1593
1594 switch (state) {
1595 case ETHTOOL_ID_ACTIVE:
1596 beacon_duration = MLX5_BEACON_DURATION_INF;
1597 break;
1598 case ETHTOOL_ID_INACTIVE:
1599 beacon_duration = MLX5_BEACON_DURATION_OFF;
1600 break;
1601 default:
1602 return -EOPNOTSUPP;
1603 }
1604
1605 return mlx5_set_port_beacon(mdev, beacon_duration);
1606 }
1607
mlx5e_get_module_info(struct net_device * netdev,struct ethtool_modinfo * modinfo)1608 static int mlx5e_get_module_info(struct net_device *netdev,
1609 struct ethtool_modinfo *modinfo)
1610 {
1611 struct mlx5e_priv *priv = netdev_priv(netdev);
1612 struct mlx5_core_dev *dev = priv->mdev;
1613 int size_read = 0;
1614 u8 data[4] = {0};
1615
1616 size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1617 if (size_read < 2)
1618 return -EIO;
1619
1620 /* data[0] = identifier byte */
1621 switch (data[0]) {
1622 case MLX5_MODULE_ID_QSFP:
1623 modinfo->type = ETH_MODULE_SFF_8436;
1624 modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1625 break;
1626 case MLX5_MODULE_ID_QSFP_PLUS:
1627 case MLX5_MODULE_ID_QSFP28:
1628 /* data[1] = revision id */
1629 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1630 modinfo->type = ETH_MODULE_SFF_8636;
1631 modinfo->eeprom_len = ETH_MODULE_SFF_8636_MAX_LEN;
1632 } else {
1633 modinfo->type = ETH_MODULE_SFF_8436;
1634 modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1635 }
1636 break;
1637 case MLX5_MODULE_ID_SFP:
1638 modinfo->type = ETH_MODULE_SFF_8472;
1639 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1640 break;
1641 default:
1642 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1643 __func__, data[0]);
1644 return -EINVAL;
1645 }
1646
1647 return 0;
1648 }
1649
mlx5e_get_module_eeprom(struct net_device * netdev,struct ethtool_eeprom * ee,u8 * data)1650 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1651 struct ethtool_eeprom *ee,
1652 u8 *data)
1653 {
1654 struct mlx5e_priv *priv = netdev_priv(netdev);
1655 struct mlx5_core_dev *mdev = priv->mdev;
1656 int offset = ee->offset;
1657 int size_read;
1658 int i = 0;
1659
1660 if (!ee->len)
1661 return -EINVAL;
1662
1663 memset(data, 0, ee->len);
1664
1665 while (i < ee->len) {
1666 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1667 data + i);
1668
1669 if (!size_read)
1670 /* Done reading */
1671 return 0;
1672
1673 if (size_read < 0) {
1674 netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1675 __func__, size_read);
1676 return 0;
1677 }
1678
1679 i += size_read;
1680 offset += size_read;
1681 }
1682
1683 return 0;
1684 }
1685
mlx5e_ethtool_flash_device(struct mlx5e_priv * priv,struct ethtool_flash * flash)1686 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1687 struct ethtool_flash *flash)
1688 {
1689 struct mlx5_core_dev *mdev = priv->mdev;
1690 struct net_device *dev = priv->netdev;
1691 const struct firmware *fw;
1692 int err;
1693
1694 if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1695 return -EOPNOTSUPP;
1696
1697 err = request_firmware_direct(&fw, flash->data, &dev->dev);
1698 if (err)
1699 return err;
1700
1701 dev_hold(dev);
1702 rtnl_unlock();
1703
1704 err = mlx5_firmware_flash(mdev, fw, NULL);
1705 release_firmware(fw);
1706
1707 rtnl_lock();
1708 dev_put(dev);
1709 return err;
1710 }
1711
mlx5e_flash_device(struct net_device * dev,struct ethtool_flash * flash)1712 static int mlx5e_flash_device(struct net_device *dev,
1713 struct ethtool_flash *flash)
1714 {
1715 struct mlx5e_priv *priv = netdev_priv(dev);
1716
1717 return mlx5e_ethtool_flash_device(priv, flash);
1718 }
1719
set_pflag_cqe_based_moder(struct net_device * netdev,bool enable,bool is_rx_cq)1720 static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1721 bool is_rx_cq)
1722 {
1723 struct mlx5e_priv *priv = netdev_priv(netdev);
1724 struct mlx5_core_dev *mdev = priv->mdev;
1725 struct mlx5e_channels new_channels = {};
1726 bool mode_changed;
1727 u8 cq_period_mode, current_cq_period_mode;
1728
1729 cq_period_mode = enable ?
1730 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1731 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1732 current_cq_period_mode = is_rx_cq ?
1733 priv->channels.params.rx_cq_moderation.cq_period_mode :
1734 priv->channels.params.tx_cq_moderation.cq_period_mode;
1735 mode_changed = cq_period_mode != current_cq_period_mode;
1736
1737 if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1738 !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1739 return -EOPNOTSUPP;
1740
1741 if (!mode_changed)
1742 return 0;
1743
1744 new_channels.params = priv->channels.params;
1745 if (is_rx_cq)
1746 mlx5e_set_rx_cq_mode_params(&new_channels.params, cq_period_mode);
1747 else
1748 mlx5e_set_tx_cq_mode_params(&new_channels.params, cq_period_mode);
1749
1750 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1751 priv->channels.params = new_channels.params;
1752 return 0;
1753 }
1754
1755 return mlx5e_safe_switch_channels(priv, &new_channels, NULL);
1756 }
1757
set_pflag_tx_cqe_based_moder(struct net_device * netdev,bool enable)1758 static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
1759 {
1760 return set_pflag_cqe_based_moder(netdev, enable, false);
1761 }
1762
set_pflag_rx_cqe_based_moder(struct net_device * netdev,bool enable)1763 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1764 {
1765 return set_pflag_cqe_based_moder(netdev, enable, true);
1766 }
1767
mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv * priv,bool new_val)1768 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
1769 {
1770 bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1771 struct mlx5e_channels new_channels = {};
1772 int err = 0;
1773
1774 if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1775 return new_val ? -EOPNOTSUPP : 0;
1776
1777 if (curr_val == new_val)
1778 return 0;
1779
1780 new_channels.params = priv->channels.params;
1781 MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1782
1783 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1784 priv->channels.params = new_channels.params;
1785 return 0;
1786 }
1787
1788 err = mlx5e_safe_switch_channels(priv, &new_channels, NULL);
1789 if (err)
1790 return err;
1791
1792 mlx5e_dbg(DRV, priv, "MLX5E: RxCqeCmprss was turned %s\n",
1793 MLX5E_GET_PFLAG(&priv->channels.params,
1794 MLX5E_PFLAG_RX_CQE_COMPRESS) ? "ON" : "OFF");
1795
1796 return 0;
1797 }
1798
set_pflag_rx_cqe_compress(struct net_device * netdev,bool enable)1799 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1800 bool enable)
1801 {
1802 struct mlx5e_priv *priv = netdev_priv(netdev);
1803 struct mlx5_core_dev *mdev = priv->mdev;
1804
1805 if (!MLX5_CAP_GEN(mdev, cqe_compression))
1806 return -EOPNOTSUPP;
1807
1808 if (enable && priv->tstamp.rx_filter != HWTSTAMP_FILTER_NONE) {
1809 netdev_err(netdev, "Can't enable cqe compression while timestamping is enabled.\n");
1810 return -EINVAL;
1811 }
1812
1813 mlx5e_modify_rx_cqe_compression_locked(priv, enable);
1814 priv->channels.params.rx_cqe_compress_def = enable;
1815
1816 return 0;
1817 }
1818
set_pflag_rx_striding_rq(struct net_device * netdev,bool enable)1819 static int set_pflag_rx_striding_rq(struct net_device *netdev, bool enable)
1820 {
1821 struct mlx5e_priv *priv = netdev_priv(netdev);
1822 struct mlx5_core_dev *mdev = priv->mdev;
1823 struct mlx5e_channels new_channels = {};
1824
1825 if (enable) {
1826 if (!mlx5e_check_fragmented_striding_rq_cap(mdev))
1827 return -EOPNOTSUPP;
1828 if (!mlx5e_striding_rq_possible(mdev, &priv->channels.params))
1829 return -EINVAL;
1830 } else if (priv->channels.params.lro_en) {
1831 netdev_warn(netdev, "Can't set legacy RQ with LRO, disable LRO first\n");
1832 return -EINVAL;
1833 }
1834
1835 new_channels.params = priv->channels.params;
1836
1837 MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_STRIDING_RQ, enable);
1838 mlx5e_set_rq_type(mdev, &new_channels.params);
1839
1840 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1841 priv->channels.params = new_channels.params;
1842 return 0;
1843 }
1844
1845 return mlx5e_safe_switch_channels(priv, &new_channels, NULL);
1846 }
1847
set_pflag_rx_no_csum_complete(struct net_device * netdev,bool enable)1848 static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)
1849 {
1850 struct mlx5e_priv *priv = netdev_priv(netdev);
1851 struct mlx5e_channels *channels = &priv->channels;
1852 struct mlx5e_channel *c;
1853 int i;
1854
1855 if (!test_bit(MLX5E_STATE_OPENED, &priv->state) ||
1856 priv->channels.params.xdp_prog)
1857 return 0;
1858
1859 for (i = 0; i < channels->num; i++) {
1860 c = channels->c[i];
1861 if (enable)
1862 __set_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1863 else
1864 __clear_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1865 }
1866
1867 return 0;
1868 }
1869
set_pflag_xdp_tx_mpwqe(struct net_device * netdev,bool enable)1870 static int set_pflag_xdp_tx_mpwqe(struct net_device *netdev, bool enable)
1871 {
1872 struct mlx5e_priv *priv = netdev_priv(netdev);
1873 struct mlx5_core_dev *mdev = priv->mdev;
1874 struct mlx5e_channels new_channels = {};
1875 int err;
1876
1877 if (enable && !MLX5_CAP_ETH(mdev, enhanced_multi_pkt_send_wqe))
1878 return -EOPNOTSUPP;
1879
1880 new_channels.params = priv->channels.params;
1881
1882 MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_XDP_TX_MPWQE, enable);
1883
1884 if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1885 priv->channels.params = new_channels.params;
1886 return 0;
1887 }
1888
1889 err = mlx5e_safe_switch_channels(priv, &new_channels, NULL);
1890 return err;
1891 }
1892
1893 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS] = {
1894 { "rx_cqe_moder", set_pflag_rx_cqe_based_moder },
1895 { "tx_cqe_moder", set_pflag_tx_cqe_based_moder },
1896 { "rx_cqe_compress", set_pflag_rx_cqe_compress },
1897 { "rx_striding_rq", set_pflag_rx_striding_rq },
1898 { "rx_no_csum_complete", set_pflag_rx_no_csum_complete },
1899 { "xdp_tx_mpwqe", set_pflag_xdp_tx_mpwqe },
1900 };
1901
mlx5e_handle_pflag(struct net_device * netdev,u32 wanted_flags,enum mlx5e_priv_flag flag)1902 static int mlx5e_handle_pflag(struct net_device *netdev,
1903 u32 wanted_flags,
1904 enum mlx5e_priv_flag flag)
1905 {
1906 struct mlx5e_priv *priv = netdev_priv(netdev);
1907 bool enable = !!(wanted_flags & BIT(flag));
1908 u32 changes = wanted_flags ^ priv->channels.params.pflags;
1909 int err;
1910
1911 if (!(changes & BIT(flag)))
1912 return 0;
1913
1914 err = mlx5e_priv_flags[flag].handler(netdev, enable);
1915 if (err) {
1916 netdev_err(netdev, "%s private flag '%s' failed err %d\n",
1917 enable ? "Enable" : "Disable", mlx5e_priv_flags[flag].name, err);
1918 return err;
1919 }
1920
1921 MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
1922 return 0;
1923 }
1924
mlx5e_set_priv_flags(struct net_device * netdev,u32 pflags)1925 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1926 {
1927 struct mlx5e_priv *priv = netdev_priv(netdev);
1928 enum mlx5e_priv_flag pflag;
1929 int err;
1930
1931 mutex_lock(&priv->state_lock);
1932
1933 for (pflag = 0; pflag < MLX5E_NUM_PFLAGS; pflag++) {
1934 err = mlx5e_handle_pflag(netdev, pflags, pflag);
1935 if (err)
1936 break;
1937 }
1938
1939 mutex_unlock(&priv->state_lock);
1940
1941 /* Need to fix some features.. */
1942 netdev_update_features(netdev);
1943
1944 return err;
1945 }
1946
mlx5e_get_priv_flags(struct net_device * netdev)1947 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1948 {
1949 struct mlx5e_priv *priv = netdev_priv(netdev);
1950
1951 return priv->channels.params.pflags;
1952 }
1953
mlx5e_get_rxnfc(struct net_device * dev,struct ethtool_rxnfc * info,u32 * rule_locs)1954 static int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, u32 *rule_locs)
1955 {
1956 struct mlx5e_priv *priv = netdev_priv(dev);
1957
1958 /* ETHTOOL_GRXRINGS is needed by ethtool -x which is not part
1959 * of rxnfc. We keep this logic out of mlx5e_ethtool_get_rxnfc,
1960 * to avoid breaking "ethtool -x" when mlx5e_ethtool_get_rxnfc
1961 * is compiled out via CONFIG_MLX5_EN_RXNFC=n.
1962 */
1963 if (info->cmd == ETHTOOL_GRXRINGS) {
1964 info->data = priv->channels.params.num_channels;
1965 return 0;
1966 }
1967
1968 return mlx5e_ethtool_get_rxnfc(dev, info, rule_locs);
1969 }
1970
mlx5e_set_rxnfc(struct net_device * dev,struct ethtool_rxnfc * cmd)1971 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1972 {
1973 return mlx5e_ethtool_set_rxnfc(dev, cmd);
1974 }
1975
1976 const struct ethtool_ops mlx5e_ethtool_ops = {
1977 .get_drvinfo = mlx5e_get_drvinfo,
1978 .get_link = ethtool_op_get_link,
1979 .get_strings = mlx5e_get_strings,
1980 .get_sset_count = mlx5e_get_sset_count,
1981 .get_ethtool_stats = mlx5e_get_ethtool_stats,
1982 .get_ringparam = mlx5e_get_ringparam,
1983 .set_ringparam = mlx5e_set_ringparam,
1984 .get_channels = mlx5e_get_channels,
1985 .set_channels = mlx5e_set_channels,
1986 .get_coalesce = mlx5e_get_coalesce,
1987 .set_coalesce = mlx5e_set_coalesce,
1988 .get_link_ksettings = mlx5e_get_link_ksettings,
1989 .set_link_ksettings = mlx5e_set_link_ksettings,
1990 .get_rxfh_key_size = mlx5e_get_rxfh_key_size,
1991 .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1992 .get_rxfh = mlx5e_get_rxfh,
1993 .set_rxfh = mlx5e_set_rxfh,
1994 .get_rxnfc = mlx5e_get_rxnfc,
1995 .set_rxnfc = mlx5e_set_rxnfc,
1996 .get_tunable = mlx5e_get_tunable,
1997 .set_tunable = mlx5e_set_tunable,
1998 .get_pauseparam = mlx5e_get_pauseparam,
1999 .set_pauseparam = mlx5e_set_pauseparam,
2000 .get_ts_info = mlx5e_get_ts_info,
2001 .set_phys_id = mlx5e_set_phys_id,
2002 .get_wol = mlx5e_get_wol,
2003 .set_wol = mlx5e_set_wol,
2004 .get_module_info = mlx5e_get_module_info,
2005 .get_module_eeprom = mlx5e_get_module_eeprom,
2006 .flash_device = mlx5e_flash_device,
2007 .get_priv_flags = mlx5e_get_priv_flags,
2008 .set_priv_flags = mlx5e_set_priv_flags,
2009 .self_test = mlx5e_self_test,
2010 .get_msglevel = mlx5e_get_msglevel,
2011 .set_msglevel = mlx5e_set_msglevel,
2012 .get_fecparam = mlx5e_get_fecparam,
2013 .set_fecparam = mlx5e_set_fecparam,
2014 };
2015