1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2018 Mellanox Technologies. */
3
4 #ifndef __MLX5E_FLOW_STEER_H__
5 #define __MLX5E_FLOW_STEER_H__
6
7 enum {
8 MLX5E_TC_FT_LEVEL = 0,
9 MLX5E_TC_TTC_FT_LEVEL,
10 };
11
12 struct mlx5e_tc_table {
13 /* protects flow table */
14 struct mutex t_lock;
15 struct mlx5_flow_table *t;
16
17 struct rhashtable ht;
18
19 struct mod_hdr_tbl mod_hdr;
20 struct mutex hairpin_tbl_lock; /* protects hairpin_tbl */
21 DECLARE_HASHTABLE(hairpin_tbl, 8);
22
23 struct notifier_block netdevice_nb;
24 };
25
26 struct mlx5e_flow_table {
27 int num_groups;
28 struct mlx5_flow_table *t;
29 struct mlx5_flow_group **g;
30 };
31
32 struct mlx5e_l2_rule {
33 u8 addr[ETH_ALEN + 2];
34 struct mlx5_flow_handle *rule;
35 };
36
37 #define MLX5E_L2_ADDR_HASH_SIZE BIT(BITS_PER_BYTE)
38
39 struct mlx5e_vlan_table {
40 struct mlx5e_flow_table ft;
41 DECLARE_BITMAP(active_cvlans, VLAN_N_VID);
42 DECLARE_BITMAP(active_svlans, VLAN_N_VID);
43 struct mlx5_flow_handle *active_cvlans_rule[VLAN_N_VID];
44 struct mlx5_flow_handle *active_svlans_rule[VLAN_N_VID];
45 struct mlx5_flow_handle *untagged_rule;
46 struct mlx5_flow_handle *any_cvlan_rule;
47 struct mlx5_flow_handle *any_svlan_rule;
48 bool cvlan_filter_disabled;
49 };
50
51 struct mlx5e_l2_table {
52 struct mlx5e_flow_table ft;
53 struct hlist_head netdev_uc[MLX5E_L2_ADDR_HASH_SIZE];
54 struct hlist_head netdev_mc[MLX5E_L2_ADDR_HASH_SIZE];
55 struct mlx5e_l2_rule broadcast;
56 struct mlx5e_l2_rule allmulti;
57 struct mlx5e_l2_rule promisc;
58 bool broadcast_enabled;
59 bool allmulti_enabled;
60 bool promisc_enabled;
61 };
62
63 enum mlx5e_traffic_types {
64 MLX5E_TT_IPV4_TCP,
65 MLX5E_TT_IPV6_TCP,
66 MLX5E_TT_IPV4_UDP,
67 MLX5E_TT_IPV6_UDP,
68 MLX5E_TT_IPV4_IPSEC_AH,
69 MLX5E_TT_IPV6_IPSEC_AH,
70 MLX5E_TT_IPV4_IPSEC_ESP,
71 MLX5E_TT_IPV6_IPSEC_ESP,
72 MLX5E_TT_IPV4,
73 MLX5E_TT_IPV6,
74 MLX5E_TT_ANY,
75 MLX5E_NUM_TT,
76 MLX5E_NUM_INDIR_TIRS = MLX5E_TT_ANY,
77 };
78
79 struct mlx5e_tirc_config {
80 u8 l3_prot_type;
81 u8 l4_prot_type;
82 u32 rx_hash_fields;
83 };
84
85 #define MLX5_HASH_IP (MLX5_HASH_FIELD_SEL_SRC_IP |\
86 MLX5_HASH_FIELD_SEL_DST_IP)
87 #define MLX5_HASH_IP_L4PORTS (MLX5_HASH_FIELD_SEL_SRC_IP |\
88 MLX5_HASH_FIELD_SEL_DST_IP |\
89 MLX5_HASH_FIELD_SEL_L4_SPORT |\
90 MLX5_HASH_FIELD_SEL_L4_DPORT)
91 #define MLX5_HASH_IP_IPSEC_SPI (MLX5_HASH_FIELD_SEL_SRC_IP |\
92 MLX5_HASH_FIELD_SEL_DST_IP |\
93 MLX5_HASH_FIELD_SEL_IPSEC_SPI)
94
95 enum mlx5e_tunnel_types {
96 MLX5E_TT_IPV4_GRE,
97 MLX5E_TT_IPV6_GRE,
98 MLX5E_TT_IPV4_IPIP,
99 MLX5E_TT_IPV6_IPIP,
100 MLX5E_TT_IPV4_IPV6,
101 MLX5E_TT_IPV6_IPV6,
102 MLX5E_NUM_TUNNEL_TT,
103 };
104
105 bool mlx5e_tunnel_inner_ft_supported(struct mlx5_core_dev *mdev);
106
107 /* L3/L4 traffic type classifier */
108 struct mlx5e_ttc_table {
109 struct mlx5e_flow_table ft;
110 struct mlx5_flow_handle *rules[MLX5E_NUM_TT];
111 struct mlx5_flow_handle *tunnel_rules[MLX5E_NUM_TUNNEL_TT];
112 };
113
114 /* NIC prio FTS */
115 enum {
116 MLX5E_VLAN_FT_LEVEL = 0,
117 MLX5E_L2_FT_LEVEL,
118 MLX5E_TTC_FT_LEVEL,
119 MLX5E_INNER_TTC_FT_LEVEL,
120 #ifdef CONFIG_MLX5_EN_ARFS
121 MLX5E_ARFS_FT_LEVEL
122 #endif
123 };
124
125 #define MLX5E_TTC_NUM_GROUPS 3
126 #define MLX5E_TTC_GROUP1_SIZE (BIT(3) + MLX5E_NUM_TUNNEL_TT)
127 #define MLX5E_TTC_GROUP2_SIZE BIT(1)
128 #define MLX5E_TTC_GROUP3_SIZE BIT(0)
129 #define MLX5E_TTC_TABLE_SIZE (MLX5E_TTC_GROUP1_SIZE +\
130 MLX5E_TTC_GROUP2_SIZE +\
131 MLX5E_TTC_GROUP3_SIZE)
132
133 #define MLX5E_INNER_TTC_NUM_GROUPS 3
134 #define MLX5E_INNER_TTC_GROUP1_SIZE BIT(3)
135 #define MLX5E_INNER_TTC_GROUP2_SIZE BIT(1)
136 #define MLX5E_INNER_TTC_GROUP3_SIZE BIT(0)
137 #define MLX5E_INNER_TTC_TABLE_SIZE (MLX5E_INNER_TTC_GROUP1_SIZE +\
138 MLX5E_INNER_TTC_GROUP2_SIZE +\
139 MLX5E_INNER_TTC_GROUP3_SIZE)
140
141 #ifdef CONFIG_MLX5_EN_RXNFC
142
143 struct mlx5e_ethtool_table {
144 struct mlx5_flow_table *ft;
145 int num_rules;
146 };
147
148 #define ETHTOOL_NUM_L3_L4_FTS 7
149 #define ETHTOOL_NUM_L2_FTS 4
150
151 struct mlx5e_ethtool_steering {
152 struct mlx5e_ethtool_table l3_l4_ft[ETHTOOL_NUM_L3_L4_FTS];
153 struct mlx5e_ethtool_table l2_ft[ETHTOOL_NUM_L2_FTS];
154 struct list_head rules;
155 int tot_num_rules;
156 };
157
158 void mlx5e_ethtool_init_steering(struct mlx5e_priv *priv);
159 void mlx5e_ethtool_cleanup_steering(struct mlx5e_priv *priv);
160 int mlx5e_ethtool_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd);
161 int mlx5e_ethtool_get_rxnfc(struct net_device *dev,
162 struct ethtool_rxnfc *info, u32 *rule_locs);
163 #else
mlx5e_ethtool_init_steering(struct mlx5e_priv * priv)164 static inline void mlx5e_ethtool_init_steering(struct mlx5e_priv *priv) { }
mlx5e_ethtool_cleanup_steering(struct mlx5e_priv * priv)165 static inline void mlx5e_ethtool_cleanup_steering(struct mlx5e_priv *priv) { }
mlx5e_ethtool_set_rxnfc(struct net_device * dev,struct ethtool_rxnfc * cmd)166 static inline int mlx5e_ethtool_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
167 { return -EOPNOTSUPP; }
mlx5e_ethtool_get_rxnfc(struct net_device * dev,struct ethtool_rxnfc * info,u32 * rule_locs)168 static inline int mlx5e_ethtool_get_rxnfc(struct net_device *dev,
169 struct ethtool_rxnfc *info, u32 *rule_locs)
170 { return -EOPNOTSUPP; }
171 #endif /* CONFIG_MLX5_EN_RXNFC */
172
173 #ifdef CONFIG_MLX5_EN_ARFS
174 #define ARFS_HASH_SHIFT BITS_PER_BYTE
175 #define ARFS_HASH_SIZE BIT(BITS_PER_BYTE)
176
177 struct arfs_table {
178 struct mlx5e_flow_table ft;
179 struct mlx5_flow_handle *default_rule;
180 struct hlist_head rules_hash[ARFS_HASH_SIZE];
181 };
182
183 enum arfs_type {
184 ARFS_IPV4_TCP,
185 ARFS_IPV6_TCP,
186 ARFS_IPV4_UDP,
187 ARFS_IPV6_UDP,
188 ARFS_NUM_TYPES,
189 };
190
191 struct mlx5e_arfs_tables {
192 struct arfs_table arfs_tables[ARFS_NUM_TYPES];
193 /* Protect aRFS rules list */
194 spinlock_t arfs_lock;
195 struct list_head rules;
196 int last_filter_id;
197 struct workqueue_struct *wq;
198 };
199
200 int mlx5e_arfs_create_tables(struct mlx5e_priv *priv);
201 void mlx5e_arfs_destroy_tables(struct mlx5e_priv *priv);
202 int mlx5e_arfs_enable(struct mlx5e_priv *priv);
203 int mlx5e_arfs_disable(struct mlx5e_priv *priv);
204 int mlx5e_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
205 u16 rxq_index, u32 flow_id);
206 #else
mlx5e_arfs_create_tables(struct mlx5e_priv * priv)207 static inline int mlx5e_arfs_create_tables(struct mlx5e_priv *priv) { return 0; }
mlx5e_arfs_destroy_tables(struct mlx5e_priv * priv)208 static inline void mlx5e_arfs_destroy_tables(struct mlx5e_priv *priv) {}
mlx5e_arfs_enable(struct mlx5e_priv * priv)209 static inline int mlx5e_arfs_enable(struct mlx5e_priv *priv) { return -EOPNOTSUPP; }
mlx5e_arfs_disable(struct mlx5e_priv * priv)210 static inline int mlx5e_arfs_disable(struct mlx5e_priv *priv) { return -EOPNOTSUPP; }
211 #endif
212
213 struct mlx5e_flow_steering {
214 struct mlx5_flow_namespace *ns;
215 #ifdef CONFIG_MLX5_EN_RXNFC
216 struct mlx5e_ethtool_steering ethtool;
217 #endif
218 struct mlx5e_tc_table tc;
219 struct mlx5e_vlan_table vlan;
220 struct mlx5e_l2_table l2;
221 struct mlx5e_ttc_table ttc;
222 struct mlx5e_ttc_table inner_ttc;
223 #ifdef CONFIG_MLX5_EN_ARFS
224 struct mlx5e_arfs_tables arfs;
225 #endif
226 };
227
228 struct ttc_params {
229 struct mlx5_flow_table_attr ft_attr;
230 u32 any_tt_tirn;
231 u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
232 struct mlx5e_ttc_table *inner_ttc;
233 };
234
235 void mlx5e_set_ttc_basic_params(struct mlx5e_priv *priv, struct ttc_params *ttc_params);
236 void mlx5e_set_ttc_ft_params(struct ttc_params *ttc_params);
237 void mlx5e_set_inner_ttc_ft_params(struct ttc_params *ttc_params);
238
239 int mlx5e_create_ttc_table(struct mlx5e_priv *priv, struct ttc_params *params,
240 struct mlx5e_ttc_table *ttc);
241 void mlx5e_destroy_ttc_table(struct mlx5e_priv *priv,
242 struct mlx5e_ttc_table *ttc);
243
244 int mlx5e_create_inner_ttc_table(struct mlx5e_priv *priv, struct ttc_params *params,
245 struct mlx5e_ttc_table *ttc);
246 void mlx5e_destroy_inner_ttc_table(struct mlx5e_priv *priv,
247 struct mlx5e_ttc_table *ttc);
248
249 void mlx5e_destroy_flow_table(struct mlx5e_flow_table *ft);
250
251 void mlx5e_enable_cvlan_filter(struct mlx5e_priv *priv);
252 void mlx5e_disable_cvlan_filter(struct mlx5e_priv *priv);
253
254 int mlx5e_create_flow_steering(struct mlx5e_priv *priv);
255 void mlx5e_destroy_flow_steering(struct mlx5e_priv *priv);
256
257 bool mlx5e_tunnel_proto_supported(struct mlx5_core_dev *mdev, u8 proto_type);
258 bool mlx5e_any_tunnel_proto_supported(struct mlx5_core_dev *mdev);
259
260 #endif /* __MLX5E_FLOW_STEER_H__ */
261
262