| /drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
| D | hw_factory_dcn21.c | 61 #define SF_HPD(reg_name, field_name, post_fix)\ argument
68 #define SF(reg_name, field_name, post_fix)\ argument
100 #define SF_DDC(reg_name, field_name, post_fix)\ argument
140 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
|
| D | hw_translate_dcn21.c | 58 #define SF_HPD(reg_name, field_name, post_fix)\ argument
|
| /drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| D | hw_factory_dcn20.c | 63 #define SF_HPD(reg_name, field_name, post_fix)\ argument
70 #define SF(reg_name, field_name, post_fix)\ argument
103 #define SF_DDC(reg_name, field_name, post_fix)\ argument
145 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
|
| D | hw_translate_dcn20.c | 58 #define SF_HPD(reg_name, field_name, post_fix)\ argument
|
| /drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
| D | hw_factory_dce120.c | 46 #define SF_HPD(reg_name, field_name, post_fix)\ argument
50 #define SF_HPD(reg_name, field_name, post_fix)\ argument
96 #define SF_DDC(reg_name, field_name, post_fix)\ argument
|
| /drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
| D | hw_factory_dcn10.c | 47 #define SF_HPD(reg_name, field_name, post_fix)\ argument
92 #define SF_DDC(reg_name, field_name, post_fix)\ argument
128 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
|
| /drivers/gpu/drm/amd/display/dc/gpio/dce110/ |
| D | hw_factory_dce110.c | 42 #define SF_HPD(reg_name, field_name, post_fix)\ argument
83 #define SF_DDC(reg_name, field_name, post_fix)\ argument
|
| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_dccg.h | 44 #define DCCG_SF(reg_name, field_name, post_fix)\ argument
47 #define DCCG_SFI(reg_name, field_name, field_prefix, inst, post_fix)\ argument
|
| D | dcn20_vmid.h | 41 #define SF(reg_name, field_name, post_fix)\ argument
|
| D | dcn20_opp.h | 33 #define OPP_SF(reg_name, field_name, post_fix)\ argument
|
| D | dcn20_mmhubbub.h | 55 #define SF(reg_name, field_name, post_fix)\ argument
|
| D | dcn20_dsc.h | 88 #define DSC_SF(reg_name, field_name, post_fix)\ argument
92 #define DSC2_SF(reg_name, field_name, post_fix)\ argument
|
| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_dpp.h | 37 #define TF_SF(reg_name, field_name, post_fix)\ argument
41 #define TF2_SF(reg_name, field_name, post_fix)\ argument
|
| D | dcn10_opp.h | 33 #define OPP_SF(reg_name, field_name, post_fix)\ argument
|
| D | dcn10_ipp.h | 74 #define IPP_SF(reg_name, field_name, post_fix)\ argument
|
| D | dcn10_hubp.h | 238 #define HUBP_SF(reg_name, field_name, post_fix)\ argument
|
| D | dcn10_dwb.h | 49 #define SF(reg_name, field_name, post_fix)\ argument
|
| D | dcn10_link_encoder.h | 128 #define LE_SF(reg_name, field_name, post_fix)\ argument
|
| /drivers/gpu/drm/amd/display/dc/gpio/dce80/ |
| D | hw_factory_dce80.c | 83 #define SF_DDC(reg_name, field_name, post_fix)\ argument
|
| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_abm.h | 86 #define ABM_SF(reg_name, field_name, post_fix)\ argument
|
| D | dce_ipp.h | 64 #define IPP_SF(reg_name, field_name, post_fix)\ argument
|
| D | dce_opp.h | 84 #define OPP_SF(reg_name, field_name, post_fix)\ argument
|
| D | dce_clock_source.h | 45 #define CS_SF(reg_name, field_name, post_fix)\ argument
|
| D | dce_audio.h | 44 #define SF(reg_name, field_name, post_fix)\ argument
|
| D | dce_hwseq.h | 442 #define HWS_SF(blk_name, reg_name, field_name, post_fix)\ argument
445 #define HWS_SF1(blk_name, reg_name, field_name, post_fix)\ argument
|