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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (c) 2016 MediaTek Inc.
4 * Author: PC Chen <pc.chen@mediatek.com>
5 *         Tiffany Lin <tiffany.lin@mediatek.com>
6 */
7 
8 #ifndef _MTK_VCODEC_DRV_H_
9 #define _MTK_VCODEC_DRV_H_
10 
11 #include <linux/platform_device.h>
12 #include <linux/videodev2.h>
13 #include <media/v4l2-ctrls.h>
14 #include <media/v4l2-device.h>
15 #include <media/v4l2-ioctl.h>
16 #include <media/videobuf2-core.h>
17 #include "mtk_vcodec_util.h"
18 
19 #define MTK_VCODEC_DRV_NAME	"mtk_vcodec_drv"
20 #define MTK_VCODEC_DEC_NAME	"mtk-vcodec-dec"
21 #define MTK_VCODEC_ENC_NAME	"mtk-vcodec-enc"
22 #define MTK_PLATFORM_STR	"platform:mt8173"
23 
24 #define MTK_VCODEC_MAX_PLANES	3
25 #define MTK_V4L2_BENCHMARK	0
26 #define WAIT_INTR_TIMEOUT_MS	1000
27 
28 /**
29  * enum mtk_hw_reg_idx - MTK hw register base index
30  */
31 enum mtk_hw_reg_idx {
32 	VDEC_SYS,
33 	VDEC_MISC,
34 	VDEC_LD,
35 	VDEC_TOP,
36 	VDEC_CM,
37 	VDEC_AD,
38 	VDEC_AV,
39 	VDEC_PP,
40 	VDEC_HWD,
41 	VDEC_HWQ,
42 	VDEC_HWB,
43 	VDEC_HWG,
44 	NUM_MAX_VDEC_REG_BASE,
45 	/* h264 encoder */
46 	VENC_SYS = NUM_MAX_VDEC_REG_BASE,
47 	/* vp8 encoder */
48 	VENC_LT_SYS,
49 	NUM_MAX_VCODEC_REG_BASE
50 };
51 
52 /**
53  * enum mtk_instance_type - The type of an MTK Vcodec instance.
54  */
55 enum mtk_instance_type {
56 	MTK_INST_DECODER		= 0,
57 	MTK_INST_ENCODER		= 1,
58 };
59 
60 /**
61  * enum mtk_instance_state - The state of an MTK Vcodec instance.
62  * @MTK_STATE_FREE - default state when instance is created
63  * @MTK_STATE_INIT - vcodec instance is initialized
64  * @MTK_STATE_HEADER - vdec had sps/pps header parsed or venc
65  *			had sps/pps header encoded
66  * @MTK_STATE_FLUSH - vdec is flushing. Only used by decoder
67  * @MTK_STATE_ABORT - vcodec should be aborted
68  */
69 enum mtk_instance_state {
70 	MTK_STATE_FREE = 0,
71 	MTK_STATE_INIT = 1,
72 	MTK_STATE_HEADER = 2,
73 	MTK_STATE_FLUSH = 3,
74 	MTK_STATE_ABORT = 4,
75 };
76 
77 /**
78  * struct mtk_encode_param - General encoding parameters type
79  */
80 enum mtk_encode_param {
81 	MTK_ENCODE_PARAM_NONE = 0,
82 	MTK_ENCODE_PARAM_BITRATE = (1 << 0),
83 	MTK_ENCODE_PARAM_FRAMERATE = (1 << 1),
84 	MTK_ENCODE_PARAM_INTRA_PERIOD = (1 << 2),
85 	MTK_ENCODE_PARAM_FORCE_INTRA = (1 << 3),
86 	MTK_ENCODE_PARAM_GOP_SIZE = (1 << 4),
87 };
88 
89 enum mtk_fmt_type {
90 	MTK_FMT_DEC = 0,
91 	MTK_FMT_ENC = 1,
92 	MTK_FMT_FRAME = 2,
93 };
94 
95 /**
96  * struct mtk_video_fmt - Structure used to store information about pixelformats
97  */
98 struct mtk_video_fmt {
99 	u32	fourcc;
100 	enum mtk_fmt_type	type;
101 	u32	num_planes;
102 	u32	flags;
103 };
104 
105 /**
106  * struct mtk_codec_framesizes - Structure used to store information about
107  *							framesizes
108  */
109 struct mtk_codec_framesizes {
110 	u32	fourcc;
111 	struct	v4l2_frmsize_stepwise	stepwise;
112 };
113 
114 /**
115  * struct mtk_q_type - Type of queue
116  */
117 enum mtk_q_type {
118 	MTK_Q_DATA_SRC = 0,
119 	MTK_Q_DATA_DST = 1,
120 };
121 
122 /**
123  * struct mtk_q_data - Structure used to store information about queue
124  */
125 struct mtk_q_data {
126 	unsigned int	visible_width;
127 	unsigned int	visible_height;
128 	unsigned int	coded_width;
129 	unsigned int	coded_height;
130 	enum v4l2_field	field;
131 	unsigned int	bytesperline[MTK_VCODEC_MAX_PLANES];
132 	unsigned int	sizeimage[MTK_VCODEC_MAX_PLANES];
133 	const struct mtk_video_fmt	*fmt;
134 };
135 
136 /**
137  * struct mtk_enc_params - General encoding parameters
138  * @bitrate: target bitrate in bits per second
139  * @num_b_frame: number of b frames between p-frame
140  * @rc_frame: frame based rate control
141  * @rc_mb: macroblock based rate control
142  * @seq_hdr_mode: H.264 sequence header is encoded separately or joined
143  *		  with the first frame
144  * @intra_period: I frame period
145  * @gop_size: group of picture size, it's used as the intra frame period
146  * @framerate_num: frame rate numerator. ex: framerate_num=30 and
147  *		   framerate_denom=1 means FPS is 30
148  * @framerate_denom: frame rate denominator. ex: framerate_num=30 and
149  *		     framerate_denom=1 means FPS is 30
150  * @h264_max_qp: Max value for H.264 quantization parameter
151  * @h264_profile: V4L2 defined H.264 profile
152  * @h264_level: V4L2 defined H.264 level
153  * @force_intra: force/insert intra frame
154  */
155 struct mtk_enc_params {
156 	unsigned int	bitrate;
157 	unsigned int	num_b_frame;
158 	unsigned int	rc_frame;
159 	unsigned int	rc_mb;
160 	unsigned int	seq_hdr_mode;
161 	unsigned int	intra_period;
162 	unsigned int	gop_size;
163 	unsigned int	framerate_num;
164 	unsigned int	framerate_denom;
165 	unsigned int	h264_max_qp;
166 	unsigned int	h264_profile;
167 	unsigned int	h264_level;
168 	unsigned int	force_intra;
169 };
170 
171 /**
172  * struct mtk_vcodec_clk_info - Structure used to store clock name
173  */
174 struct mtk_vcodec_clk_info {
175 	const char	*clk_name;
176 	struct clk	*vcodec_clk;
177 };
178 
179 /**
180  * struct mtk_vcodec_clk - Structure used to store vcodec clock information
181  */
182 struct mtk_vcodec_clk {
183 	struct mtk_vcodec_clk_info	*clk_info;
184 	int	clk_num;
185 };
186 
187 /**
188  * struct mtk_vcodec_pm - Power management data structure
189  */
190 struct mtk_vcodec_pm {
191 	struct mtk_vcodec_clk	vdec_clk;
192 	struct device	*larbvdec;
193 
194 	struct mtk_vcodec_clk	venc_clk;
195 	struct device	*larbvenc;
196 	struct device	*larbvenclt;
197 	struct device	*dev;
198 	struct mtk_vcodec_dev	*mtkdev;
199 };
200 
201 /**
202  * struct vdec_pic_info  - picture size information
203  * @pic_w: picture width
204  * @pic_h: picture height
205  * @buf_w: picture buffer width (64 aligned up from pic_w)
206  * @buf_h: picture buffer heiht (64 aligned up from pic_h)
207  * @fb_sz: bitstream size of each plane
208  * E.g. suppose picture size is 176x144,
209  *      buffer size will be aligned to 176x160.
210  * @cap_fourcc: fourcc number(may changed when resolution change)
211  * @reserved: align struct to 64-bit in order to adjust 32-bit and 64-bit os.
212  */
213 struct vdec_pic_info {
214 	unsigned int pic_w;
215 	unsigned int pic_h;
216 	unsigned int buf_w;
217 	unsigned int buf_h;
218 	unsigned int fb_sz[VIDEO_MAX_PLANES];
219 	unsigned int cap_fourcc;
220 	unsigned int reserved;
221 };
222 
223 /**
224  * struct mtk_vcodec_ctx - Context (instance) private data.
225  *
226  * @type: type of the instance - decoder or encoder
227  * @dev: pointer to the mtk_vcodec_dev of the device
228  * @list: link to ctx_list of mtk_vcodec_dev
229  * @fh: struct v4l2_fh
230  * @m2m_ctx: pointer to the v4l2_m2m_ctx of the context
231  * @q_data: store information of input and output queue
232  *	    of the context
233  * @id: index of the context that this structure describes
234  * @state: state of the context
235  * @param_change: indicate encode parameter type
236  * @enc_params: encoding parameters
237  * @dec_if: hooked decoder driver interface
238  * @enc_if: hoooked encoder driver interface
239  * @drv_handle: driver handle for specific decode/encode instance
240  *
241  * @picinfo: store picture info after header parsing
242  * @dpb_size: store dpb count after header parsing
243  * @int_cond: variable used by the waitqueue
244  * @int_type: type of the last interrupt
245  * @queue: waitqueue that can be used to wait for this context to
246  *	   finish
247  * @irq_status: irq status
248  *
249  * @ctrl_hdl: handler for v4l2 framework
250  * @decode_work: worker for the decoding
251  * @encode_work: worker for the encoding
252  * @last_decoded_picinfo: pic information get from latest decode
253  * @empty_flush_buf: a fake size-0 capture buffer that indicates flush
254  *
255  * @colorspace: enum v4l2_colorspace; supplemental to pixelformat
256  * @ycbcr_enc: enum v4l2_ycbcr_encoding, Y'CbCr encoding
257  * @quantization: enum v4l2_quantization, colorspace quantization
258  * @xfer_func: enum v4l2_xfer_func, colorspace transfer function
259  * @lock: protect variables accessed by V4L2 threads and worker thread such as
260  *	  mtk_video_dec_buf.
261  */
262 struct mtk_vcodec_ctx {
263 	enum mtk_instance_type type;
264 	struct mtk_vcodec_dev *dev;
265 	struct list_head list;
266 
267 	struct v4l2_fh fh;
268 	struct v4l2_m2m_ctx *m2m_ctx;
269 	struct mtk_q_data q_data[2];
270 	int id;
271 	enum mtk_instance_state state;
272 	enum mtk_encode_param param_change;
273 	struct mtk_enc_params enc_params;
274 
275 	const struct vdec_common_if *dec_if;
276 	const struct venc_common_if *enc_if;
277 	void *drv_handle;
278 
279 	struct vdec_pic_info picinfo;
280 	int dpb_size;
281 
282 	int int_cond;
283 	int int_type;
284 	wait_queue_head_t queue;
285 	unsigned int irq_status;
286 
287 	struct v4l2_ctrl_handler ctrl_hdl;
288 	struct work_struct decode_work;
289 	struct work_struct encode_work;
290 	struct vdec_pic_info last_decoded_picinfo;
291 	struct mtk_video_dec_buf *empty_flush_buf;
292 
293 	enum v4l2_colorspace colorspace;
294 	enum v4l2_ycbcr_encoding ycbcr_enc;
295 	enum v4l2_quantization quantization;
296 	enum v4l2_xfer_func xfer_func;
297 
298 	int decoded_frame_cnt;
299 	struct mutex lock;
300 
301 };
302 
303 /**
304  * struct mtk_vcodec_dev - driver data
305  * @v4l2_dev: V4L2 device to register video devices for.
306  * @vfd_dec: Video device for decoder
307  * @vfd_enc: Video device for encoder.
308  *
309  * @m2m_dev_dec: m2m device for decoder
310  * @m2m_dev_enc: m2m device for encoder.
311  * @plat_dev: platform device
312  * @vpu_plat_dev: mtk vpu platform device
313  * @ctx_list: list of struct mtk_vcodec_ctx
314  * @irqlock: protect data access by irq handler and work thread
315  * @curr_ctx: The context that is waiting for codec hardware
316  *
317  * @reg_base: Mapped address of MTK Vcodec registers.
318  *
319  * @id_counter: used to identify current opened instance
320  *
321  * @encode_workqueue: encode work queue
322  *
323  * @int_cond: used to identify interrupt condition happen
324  * @int_type: used to identify what kind of interrupt condition happen
325  * @dev_mutex: video_device lock
326  * @queue: waitqueue for waiting for completion of device commands
327  *
328  * @dec_irq: decoder irq resource
329  * @enc_irq: h264 encoder irq resource
330  * @enc_lt_irq: vp8 encoder irq resource
331  *
332  * @dec_mutex: decoder hardware lock
333  * @enc_mutex: encoder hardware lock.
334  *
335  * @pm: power management control
336  * @dec_capability: used to identify decode capability, ex: 4k
337  * @enc_capability: used to identify encode capability
338  */
339 struct mtk_vcodec_dev {
340 	struct v4l2_device v4l2_dev;
341 	struct video_device *vfd_dec;
342 	struct video_device *vfd_enc;
343 
344 	struct v4l2_m2m_dev *m2m_dev_dec;
345 	struct v4l2_m2m_dev *m2m_dev_enc;
346 	struct platform_device *plat_dev;
347 	struct platform_device *vpu_plat_dev;
348 	struct list_head ctx_list;
349 	spinlock_t irqlock;
350 	struct mtk_vcodec_ctx *curr_ctx;
351 	void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE];
352 
353 	unsigned long id_counter;
354 
355 	struct workqueue_struct *decode_workqueue;
356 	struct workqueue_struct *encode_workqueue;
357 	int int_cond;
358 	int int_type;
359 	struct mutex dev_mutex;
360 	wait_queue_head_t queue;
361 
362 	int dec_irq;
363 	int enc_irq;
364 	int enc_lt_irq;
365 
366 	struct mutex dec_mutex;
367 	struct mutex enc_mutex;
368 
369 	struct mtk_vcodec_pm pm;
370 	unsigned int dec_capability;
371 	unsigned int enc_capability;
372 };
373 
fh_to_ctx(struct v4l2_fh * fh)374 static inline struct mtk_vcodec_ctx *fh_to_ctx(struct v4l2_fh *fh)
375 {
376 	return container_of(fh, struct mtk_vcodec_ctx, fh);
377 }
378 
ctrl_to_ctx(struct v4l2_ctrl * ctrl)379 static inline struct mtk_vcodec_ctx *ctrl_to_ctx(struct v4l2_ctrl *ctrl)
380 {
381 	return container_of(ctrl->handler, struct mtk_vcodec_ctx, ctrl_hdl);
382 }
383 
384 #endif /* _MTK_VCODEC_DRV_H_ */
385