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/arch/arm/include/asm/hardware/
Dcp14.h12 #define dbg_write(val, reg) WCP14_##reg(val) argument
14 #define etm_write(val, reg) WCP14_##reg(val) argument
24 #define MCR14(val, op1, crn, crm, op2) \ argument
152 #define WCP14_DBGDTRTXint(val) MCR14(val, 0, c0, c5, 0) argument
153 #define WCP14_DBGWFAR(val) MCR14(val, 0, c0, c6, 0) argument
154 #define WCP14_DBGVCR(val) MCR14(val, 0, c0, c7, 0) argument
155 #define WCP14_DBGECR(val) MCR14(val, 0, c0, c9, 0) argument
156 #define WCP14_DBGDSCCR(val) MCR14(val, 0, c0, c10, 0) argument
157 #define WCP14_DBGDSMCR(val) MCR14(val, 0, c0, c11, 0) argument
158 #define WCP14_DBGDTRRXext(val) MCR14(val, 0, c0, c0, 2) argument
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/arch/arm64/lib/
Dcopy_from_user.S23 .macro ldrb1 ptr, regB, val
27 .macro strb1 ptr, regB, val
31 .macro ldrh1 ptr, regB, val
35 .macro strh1 ptr, regB, val
39 .macro ldr1 ptr, regB, val
43 .macro str1 ptr, regB, val
47 .macro ldp1 ptr, regB, regC, val
51 .macro stp1 ptr, regB, regC, val
Dmemcpy.S27 .macro ldrb1 ptr, regB, val
31 .macro strb1 ptr, regB, val
35 .macro ldrh1 ptr, regB, val
39 .macro strh1 ptr, regB, val
43 .macro ldr1 ptr, regB, val
47 .macro str1 ptr, regB, val
51 .macro ldp1 ptr, regB, regC, val
55 .macro stp1 ptr, regB, regC, val
Dcopy_to_user.S22 .macro ldrb1 ptr, regB, val
26 .macro strb1 ptr, regB, val
30 .macro ldrh1 ptr, regB, val
34 .macro strh1 ptr, regB, val
38 .macro ldr1 ptr, regB, val
42 .macro str1 ptr, regB, val
46 .macro ldp1 ptr, regB, regC, val
50 .macro stp1 ptr, regB, regC, val
Dcopy_in_user.S24 .macro ldrb1 ptr, regB, val
28 .macro strb1 ptr, regB, val
32 .macro ldrh1 ptr, regB, val
36 .macro strh1 ptr, regB, val
40 .macro ldr1 ptr, regB, val
44 .macro str1 ptr, regB, val
48 .macro ldp1 ptr, regB, regC, val
52 .macro stp1 ptr, regB, regC, val
/arch/alpha/lib/
Dfpreg.c12 #define STT(reg,val) asm volatile ("ftoit $f"#reg",%0" : "=r"(val)); argument
14 #define STT(reg,val) asm volatile ("stt $f"#reg",%0" : "=m"(val)); argument
20 unsigned long val; in alpha_read_fp_reg() local
62 #define LDT(reg,val) asm volatile ("itoft %0,$f"#reg : : "r"(val)); argument
64 #define LDT(reg,val) asm volatile ("ldt $f"#reg",%0" : : "m"(val)); argument
68 alpha_write_fp_reg (unsigned long reg, unsigned long val) in alpha_write_fp_reg()
108 #define STS(reg,val) asm volatile ("ftois $f"#reg",%0" : "=r"(val)); argument
110 #define STS(reg,val) asm volatile ("sts $f"#reg",%0" : "=m"(val)); argument
116 unsigned long val; in alpha_read_fp_reg_s() local
158 #define LDS(reg,val) asm volatile ("itofs %0,$f"#reg : : "r"(val)); argument
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/arch/arm/mach-tango/
Dsmc.h4 #define tango_set_l2_control(val) tango_smc(val, 0x102) argument
5 #define tango_start_aux_core(val) tango_smc(val, 0x104) argument
6 #define tango_set_aux_boot_addr(val) tango_smc(val, 0x105) argument
7 #define tango_suspend(val) tango_smc(val, 0x120) argument
8 #define tango_aux_core_die(val) tango_smc(val, 0x121) argument
9 #define tango_aux_core_kill(val) tango_smc(val, 0x122) argument
/arch/s390/include/asm/
Dpercpu.h27 #define arch_this_cpu_to_op_simple(pcp, val, op) \ argument
44 #define this_cpu_add_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
45 #define this_cpu_add_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
46 #define this_cpu_add_return_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
47 #define this_cpu_add_return_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
48 #define this_cpu_and_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, &) argument
49 #define this_cpu_and_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, &) argument
50 #define this_cpu_or_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, |) argument
51 #define this_cpu_or_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, |) argument
55 #define this_cpu_add_4(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
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/arch/alpha/include/uapi/asm/
Dcompiler.h14 # define __kernel_insbl(val, shift) __builtin_alpha_insbl(val, shift) argument
15 # define __kernel_inswl(val, shift) __builtin_alpha_inswl(val, shift) argument
16 # define __kernel_insql(val, shift) __builtin_alpha_insql(val, shift) argument
17 # define __kernel_inslh(val, shift) __builtin_alpha_inslh(val, shift) argument
18 # define __kernel_extbl(val, shift) __builtin_alpha_extbl(val, shift) argument
19 # define __kernel_extwl(val, shift) __builtin_alpha_extwl(val, shift) argument
22 # define __kernel_insbl(val, shift) \ argument
26 # define __kernel_inswl(val, shift) \ argument
30 # define __kernel_insql(val, shift) \ argument
34 # define __kernel_inslh(val, shift) \ argument
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/arch/arm64/include/asm/
Dpercpu.h165 #define this_cpu_write_1(pcp, val) \ argument
167 #define this_cpu_write_2(pcp, val) \ argument
169 #define this_cpu_write_4(pcp, val) \ argument
171 #define this_cpu_write_8(pcp, val) \ argument
174 #define this_cpu_add_1(pcp, val) \ argument
176 #define this_cpu_add_2(pcp, val) \ argument
178 #define this_cpu_add_4(pcp, val) \ argument
180 #define this_cpu_add_8(pcp, val) \ argument
183 #define this_cpu_add_return_1(pcp, val) \ argument
185 #define this_cpu_add_return_2(pcp, val) \ argument
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/arch/sh/include/asm/
Dunaligned-sh4a.h94 static inline void nonnative_put_le16(u16 val, u8 *p) in nonnative_put_le16()
100 static inline void nonnative_put_le32(u32 val, u8 *p) in nonnative_put_le32()
106 static inline void nonnative_put_le64(u64 val, u8 *p) in nonnative_put_le64()
112 static inline void nonnative_put_be16(u16 val, u8 *p) in nonnative_put_be16()
118 static inline void nonnative_put_be32(u32 val, u8 *p) in nonnative_put_be32()
124 static inline void nonnative_put_be64(u64 val, u8 *p) in nonnative_put_be64()
130 static inline void put_unaligned_le16(u16 val, void *p) in put_unaligned_le16()
139 static inline void put_unaligned_le32(u32 val, void *p) in put_unaligned_le32()
148 static inline void put_unaligned_le64(u64 val, void *p) in put_unaligned_le64()
157 static inline void put_unaligned_be16(u16 val, void *p) in put_unaligned_be16()
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/arch/c6x/include/uapi/asm/
Dswab.h13 static inline __attribute_const__ __u16 __c6x_swab16(__u16 val) in __c6x_swab16()
19 static inline __attribute_const__ __u32 __c6x_swab32(__u32 val) in __c6x_swab32()
27 static inline __attribute_const__ __u64 __c6x_swab64(__u64 val) in __c6x_swab64()
37 static inline __attribute_const__ __u32 __c6x_swahw32(__u32 val) in __c6x_swahw32()
43 static inline __attribute_const__ __u32 __c6x_swahb32(__u32 val) in __c6x_swahb32()
/arch/sparc/kernel/
Dpcr.c57 u64 val; in direct_pcr_read() local
64 static void direct_pcr_write(unsigned long reg_num, u64 val) in direct_pcr_write()
72 u64 val; in direct_pic_read() local
79 static void direct_pic_write(unsigned long reg_num, u64 val) in direct_pic_write()
111 static void n2_pcr_write(unsigned long reg_num, u64 val) in n2_pcr_write()
146 unsigned long val; in n4_pcr_read() local
153 static void n4_pcr_write(unsigned long reg_num, u64 val) in n4_pcr_write()
160 unsigned long val; in n4_pic_read() local
169 static void n4_pic_write(unsigned long reg_num, u64 val) in n4_pic_write()
197 unsigned long val; in n5_pcr_read() local
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/arch/x86/include/asm/
Dpercpu.h90 #define percpu_to_op(qual, op, var, val) \ argument
127 #define percpu_add_op(qual, var, val) \ argument
267 #define percpu_add_return_op(qual, var, val) \ argument
398 #define raw_cpu_write_1(pcp, val) percpu_to_op(, "mov", (pcp), val) argument
399 #define raw_cpu_write_2(pcp, val) percpu_to_op(, "mov", (pcp), val) argument
400 #define raw_cpu_write_4(pcp, val) percpu_to_op(, "mov", (pcp), val) argument
401 #define raw_cpu_add_1(pcp, val) percpu_add_op(, (pcp), val) argument
402 #define raw_cpu_add_2(pcp, val) percpu_add_op(, (pcp), val) argument
403 #define raw_cpu_add_4(pcp, val) percpu_add_op(, (pcp), val) argument
404 #define raw_cpu_and_1(pcp, val) percpu_to_op(, "and", (pcp), val) argument
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Dmshyperv.h17 #define hv_init_timer_config(timer, val) \ argument
20 #define hv_get_simp(val) rdmsrl(HV_X64_MSR_SIMP, val) argument
21 #define hv_set_simp(val) wrmsrl(HV_X64_MSR_SIMP, val) argument
23 #define hv_get_siefp(val) rdmsrl(HV_X64_MSR_SIEFP, val) argument
24 #define hv_set_siefp(val) wrmsrl(HV_X64_MSR_SIEFP, val) argument
26 #define hv_get_synic_state(val) rdmsrl(HV_X64_MSR_SCONTROL, val) argument
27 #define hv_set_synic_state(val) wrmsrl(HV_X64_MSR_SCONTROL, val) argument
33 #define hv_get_synint_state(int_num, val) \ argument
35 #define hv_set_synint_state(int_num, val) \ argument
38 #define hv_get_crash_ctl(val) \ argument
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Dpgtable-invert.h16 static inline bool __pte_needs_invert(u64 val) in __pte_needs_invert()
22 static inline u64 protnone_mask(u64 val) in protnone_mask()
27 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask) in flip_protnone_guard()
/arch/arc/include/asm/
Dspinlock.h19 unsigned int val; in arch_spin_lock() local
46 unsigned int val, got_it = 0; in arch_spin_trylock() local
81 unsigned int val; in arch_read_lock() local
111 unsigned int val, got_it = 0; in arch_read_trylock() local
136 unsigned int val; in arch_write_lock() local
169 unsigned int val, got_it = 0; in arch_write_trylock() local
195 unsigned int val; in arch_read_unlock() local
224 unsigned int val = __ARCH_SPIN_LOCK_LOCKED__; in arch_spin_lock() local
252 unsigned int val = __ARCH_SPIN_LOCK_LOCKED__; in arch_spin_trylock() local
269 unsigned int val = __ARCH_SPIN_LOCK_UNLOCKED__; in arch_spin_unlock() local
/arch/mips/include/asm/
Dmipsregs.h1319 #define write_r10k_perf_cntr(counter,val) \ argument
1338 #define write_r10k_perf_cntl(counter,val) \ argument
1445 #define __write_ulong_c0_register(reg, sel, val) \ argument
1504 #define __write_64bit_c0_split(source, sel, val) \ argument
1583 #define write_c0_index(val) __write_32bit_c0_register($0, 0, val) argument
1586 #define write_c0_random(val) __write_32bit_c0_register($1, 0, val) argument
1589 #define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val) argument
1592 #define writex_c0_entrylo0(val) __writex_32bit_c0_register($2, 0, val) argument
1595 #define write_c0_entrylo1(val) __write_ulong_c0_register($3, 0, val) argument
1598 #define writex_c0_entrylo1(val) __writex_32bit_c0_register($3, 0, val) argument
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Dmipsmtregs.h21 #define write_c0_mvpcontrol(val) __write_32bit_c0_register($0, 1, val) argument
27 #define write_c0_vpecontrol(val) __write_32bit_c0_register($1, 1, val) argument
30 #define write_c0_vpeconf0(val) __write_32bit_c0_register($1, 2, val) argument
33 #define write_c0_vpeconf1(val) __write_32bit_c0_register($1, 3, val) argument
36 #define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val) argument
40 #define write_c0_tchalt(val) __write_32bit_c0_register($2, 4, val) argument
43 #define write_c0_tccontext(val) __write_32bit_c0_register($2, 5, val) argument
376 #define write_vpe_c0_vpecontrol(val) mttc0(1, 1, val) argument
378 #define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val) argument
380 #define write_vpe_c0_vpeconf1(val) mttc0(1, 3, val) argument
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/arch/arm/probes/kprobes/
Dtest-arm.c19 #define TEST_ARM_TO_THUMB_INTERWORK_R(code1, reg, val, code2) \ argument
34 #define TEST_ARM_TO_THUMB_INTERWORK_P(code1, reg, val, code2) \ argument
57 #define _DATA_PROCESSING_DNM(op,s,val) \ in kprobe_arm_test_cases() argument
80 #define DATA_PROCESSING_DNM(op,val) \ in kprobe_arm_test_cases() argument
84 #define DATA_PROCESSING_NM(op,val) \ in kprobe_arm_test_cases() argument
106 #define _DATA_PROCESSING_DM(op,s,val) \ in kprobe_arm_test_cases() argument
127 #define DATA_PROCESSING_DM(op,val) \ in kprobe_arm_test_cases() argument
/arch/mips/boot/tools/
Drelocs.c131 #define le16_to_cpu(val) (val) argument
132 #define le32_to_cpu(val) (val) argument
133 #define le64_to_cpu(val) (val) argument
134 #define be16_to_cpu(val) bswap_16(val) argument
135 #define be32_to_cpu(val) bswap_32(val) argument
136 #define be64_to_cpu(val) bswap_64(val) argument
138 #define cpu_to_le16(val) (val) argument
139 #define cpu_to_le32(val) (val) argument
140 #define cpu_to_le64(val) (val) argument
141 #define cpu_to_be16(val) bswap_16(val) argument
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/arch/x86/kvm/
Ddebugfs.c11 static int vcpu_get_timer_advance_ns(void *data, u64 *val) in vcpu_get_timer_advance_ns()
20 static int vcpu_get_tsc_offset(void *data, u64 *val) in vcpu_get_tsc_offset()
29 static int vcpu_get_tsc_scaling_ratio(void *data, u64 *val) in vcpu_get_tsc_scaling_ratio()
38 static int vcpu_get_tsc_scaling_frac_bits(void *data, u64 *val) in vcpu_get_tsc_scaling_frac_bits()
/arch/arm/nwfpe/
Dfpmodule.inl32 unsigned int val = regs->uregs[nReg]; local
39 writeRegister(const unsigned int nReg, const unsigned long val)
50 static inline void writeCPSR(const unsigned long val)
64 static inline void writeConditionCodes(const unsigned long val)
/arch/powerpc/kernel/
Diomap.c76 void iowrite8(u8 val, void __iomem *addr) in iowrite8()
80 void iowrite16(u16 val, void __iomem *addr) in iowrite16()
84 void iowrite16be(u16 val, void __iomem *addr) in iowrite16be()
88 void iowrite32(u32 val, void __iomem *addr) in iowrite32()
92 void iowrite32be(u32 val, void __iomem *addr) in iowrite32be()
102 void iowrite64(u64 val, void __iomem *addr) in iowrite64()
106 void iowrite64_lo_hi(u64 val, void __iomem *addr) in iowrite64_lo_hi()
110 void iowrite64_hi_lo(u64 val, void __iomem *addr) in iowrite64_hi_lo()
114 void iowrite64be(u64 val, void __iomem *addr) in iowrite64be()
118 void iowrite64be_lo_hi(u64 val, void __iomem *addr) in iowrite64be_lo_hi()
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/arch/arc/kernel/
Dunaligned.c26 #define __get8_unaligned_check(val, addr, err) \ argument
42 #define get16_unaligned_check(val, addr) \ argument
53 #define get32_unaligned_check(val, addr) \ argument
68 #define put16_unaligned_check(val, addr) \ argument
95 #define put32_unaligned_check(val, addr) \ argument
135 int val; in fixup_load() local

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