Searched +full:0 +full:x01000 (Results 1 – 2 of 2) sorted by relevance
29 the child's base address to 0, the physical address within parent's address42 reg = <0x01000 0x1000>;46 offset = <0x08>;47 mask = <0x01>;
53 enum: [ 0, 1 ]60 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI64 SPI interrupts are in the range [0-987]. PPI interrupts are in the65 range [0-15].68 bits[3:0] trigger type and level flags.133 "^v2m@[0-9a-f]+$":180 reg = <0xfff11000 0x1000>,181 <0xfff10100 0x100>;190 reg = <0x2c001000 0x1000>,191 <0x2c002000 0x2000>,[all …]