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/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-ccu.yaml125 reg = <0x01c20000 0x400>;
135 reg = <0x01f01400 0x100>;
Dsunxi.txt74 "allwinner,sun4i-a10-mod0-clk" - for the module 0 family of clocks
75 "allwinner,sun9i-a80-mod0-clk" - for module 0 (storage) clocks on A80
79 "allwinner,sun4i-a10-tcon-ch0-clk" - for the TCON channel 0 clock on the A10
96 - #clock-cells : from common clock binding; shall be set to 0 except for
110 - reset-cells : shall be set to 0
131 main clock, with the ID 0, and the output and sample clocks, with the
141 #clock-cells = <0>;
143 reg = <0x01c20050 0x4>;
149 #clock-cells = <0>;
151 reg = <0x01c20000 0x4>;
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