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31 reg = <0 0x2b1f0000 0x1000>;32 interrupts = <0 36 4>, /* LP-NonSecure */33 <0 35 4>, /* HP-NonSecure */34 <0 37 4>; /* Secure */35 clocks = <&clock 0 2 1>;41 reg = <0 0x2e000000 0x4000>;
33 enum: [ 0, 1, 2 ]46 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI51 SPI interrupts are in the range [0-987]. PPI interrupts are in the52 range [0-15]. Extented SPI interrupts are in the range [0-1023].53 Extended PPI interrupts are in the range [0-127].56 bits[3:0] trigger type and level flags.68 of 0 if present.96 - multipleOf: 0x1000097 exclusiveMinimum: 0140 "^interrupt-partition-[0-9]+$":[all …]