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/Documentation/devicetree/bindings/security/tpm/
Dtpm_tis_mmio.txt15 - reg: The location of the MMIO registers, should be at least 0x5000 bytes
22 reg = <0x90000 0x5000>;
/Documentation/x86/
Dboot.rst28 Protocol 2.02 (Kernel 2.4.0-test3-pre3) New command line protocol.
81 0A0000 +------------------------+
103 0x100000 ("high memory"), and the kernel real-mode block (boot sector,
105 0x10000 and end of low memory. Unfortunately, in protocols 2.00 and
106 2.01 the 0x90000+ memory range is still used internally by the kernel;
121 0x90000 segment, the boot loader should make sure not to use memory
122 above the 0x9A000 point; too many BIOSes will break above that point.
131 0A0000 +------------------------+
162 following header at offset 0x01f1. The real-mode code can total up to
177 01FE/2 ALL boot_flag 0xAA55 magic number
[all …]
/Documentation/devicetree/bindings/crypto/
Dmarvell-cesa.txt37 reg = <0x90000 0x10000>;
43 marvell,crypto-sram-size = <0x600>;
/Documentation/devicetree/bindings/display/msm/
Dmdp5.txt63 Port 0 -> MDP_INTF0 (eDP)
69 Port 0 -> MDP_INTF1 (DSI1)
72 Port 0 -> MDP_INTF1 (DSI1)
87 reg = <0x1a00000 0x1000>,
88 <0x1ac8000 0x3000>;
100 interrupts = <0 72 0>;
111 reg = <0x1a01000 0x90000>;
115 interrupts = <0 0>;
128 #size-cells = <0>;
130 port@0 {
[all …]
/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic.yaml53 enum: [ 0, 1 ]
60 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
64 SPI interrupts are in the range [0-987]. PPI interrupts are in the
65 range [0-15].
68 bits[3:0] trigger type and level flags.
133 "^v2m@[0-9a-f]+$":
180 reg = <0xfff11000 0x1000>,
181 <0xfff10100 0x100>;
190 reg = <0x2c001000 0x1000>,
191 <0x2c002000 0x2000>,
[all …]
/Documentation/devicetree/bindings/net/
Dkeystone-netcp.txt38 |-> Ethernet Port 0
83 index #0 - switch subsystem registers
88 index #0 - switch subsystem registers
96 -- slave-port: Switch port number, 0 based numbering.
98 - mac<->mac auto negotiate mode: 0
111 --- #clock-cells: should be 0
159 ethernet.txt and only if efuse-mac is set to 0. If all of the optional MAC
166 reg = <0x2620110 0x8>;
171 ranges = <0 0x2000000 0xfffff>;
175 dma-id = <0>;
[all …]
Dfsl-fman.txt28 FMan block. The offset is 0xc4 from the beginning of the
29 Frame Processing Manager memory map (0xc3000 from the
44 DEVDISR[1] 1 0
49 DCFG_DEVDISR2[6] 1 0
56 DCFG_CCSR_DEVDISR2[24] 1 0
141 muram@0 {
143 ranges = <0 0x000000 0x28000>;
208 cell-index = <0x28>;
210 reg = <0xa8000 0x1000>;
214 cell-index = <0x8>;
[all …]