Searched full:13 (Results 1 – 25 of 418) sorted by relevance
12345678910>>...17
| /Documentation/input/ |
| D | input.rst | 49 will be available as a character device on major 13, minor 63::
51 crw-r--r-- 1 root root 13, 63 Mar 28 22:45 mice
58 mknod input/mice c 13 63
99 crw-r--r-- 1 root root 13, 64 Apr 1 10:49 event0
100 crw-r--r-- 1 root root 13, 65 Apr 1 10:50 event1
101 crw-r--r-- 1 root root 13, 66 Apr 1 10:50 event2
102 crw-r--r-- 1 root root 13, 67 Apr 1 10:50 event3
125 crw-r--r-- 1 root root 13, 32 Mar 28 22:45 mouse0
126 crw-r--r-- 1 root root 13, 33 Mar 29 00:41 mouse1
127 crw-r--r-- 1 root root 13, 34 Mar 29 00:41 mouse2
[all …]
|
| /Documentation/media/v4l-drivers/ |
| D | tm6000-cardlist.rst | 69 * - 13
71 - 13d3:3240, 13d3:3241, 13d3:3243, 13d3:3264
|
| /Documentation/devicetree/bindings/pci/ |
| D | v3-v360epc-pci.txt | 56 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
64 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
68 0x5800 0 0 3 &pic 13 /* INT C on slot 11 is irq 13 */
72 0x6000 0 0 2 &pic 13 /* INT B on slot 12 is irq 13 */
|
| /Documentation/devicetree/bindings/clock/ |
| D | samsung,s2mps11.txt | 8 The S2MPS11/13/15 and S5M8767 provide three(AP/CP/BT) buffered 32.768 kHz
30 32KhzAP 0 S2MPS11/13/14/15, S5M8767
31 32KhzCP 1 S2MPS11/13/15, S5M8767
32 32KhzBT 2 S2MPS11/13/14/15, S5M8767
|
| /Documentation/devicetree/bindings/perf/ |
| D | nds32v3-pmu.txt | 11 - interrupts : The interrupt number for NDS32 PMU is 13.
16 interrupts = <13>;
|
| /Documentation/media/uapi/v4l/ |
| D | pixfmt-sdr-pcu16be.rst | 43 - I'\ :sub:`0[13:6]`
48 - I'\ :sub:`1[13:6]`
54 - Q'\ :sub:`0[13:6]`
59 - Q'\ :sub:`1[13:6]`
|
| D | pixfmt-sdr-cs14le.rst | 38 - I'\ :sub:`0[13:8]`
41 - Q'\ :sub:`0[13:8]`
|
| /Documentation/hwmon/ |
| D | nct6683.rst | 37 build date 04/03/13 do not match the register locations in the Nuvoton
61 Intel DH87RL NCT6683D EC firmware version 1.0 build 04/03/13
62 Intel DH87MC NCT6683D EC firmware version 1.0 build 04/03/13
63 Intel DB85FL NCT6683D EC firmware version 1.0 build 04/03/13
|
| D | w83795.rst | 40 13 VSEN1 (VCORE1) 10h in0
43 16 VSEN4 13h in3
78 47 FANCTL4 13h (bank 2) pwm4
102 13 VSEN4 13h in3
|
| /Documentation/core-api/ |
| D | packing.rst | 57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
73 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
86 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
100 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
108 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
123 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
134 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
145 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
|
| /Documentation/ABI/stable/ |
| D | sysfs-devices-system-cpu | 2 Date: 13-May-2014
13 Date: 13-May-2014
|
| /Documentation/spi/ |
| D | spi-lm70llp.rst | 48 Select 13 <-- SI/O 1
70 the collector to zero, which is reflected on pin 13 of the DB25 parport
73 reflected on pin 13 as a High level.
76 inverting the value read at pin 13.
|
| /Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx35-pinctrl.txt | 15 PAD_CTL_DRIVE_VOLAGAGE_18 (1 << 13)
16 PAD_CTL_DRIVE_VOLAGAGE_33 (0 << 13)
|
| D | pinctrl-mt7622.txt | 103 PIN 13: "SPI_CS"
256 "snfi" "flash" 8, 9, 10, 11, 12, 13
257 "spi_nor" "flash" 8, 9, 10, 11, 12, 13
297 "spic2_0" "spi" 10, 11, 12, 13
299 "tdm_0_in_mclk_bclk_ws" "tdm" 11, 12, 13
346 PIN 13: "EPHY_LED1_N_JTDI"
423 "ephy_leds" "led" 12, 13, 14, 15, 16,
426 "ephy1_led" "led" 13
|
| /Documentation/devicetree/bindings/hwmon/ |
| D | gpio-fan.txt | 25 &gpio1 13 1>;
34 &gpio2 13 1>;
|
| /Documentation/devicetree/bindings/dma/ |
| D | sirfsoc-dma.txt | 30 dma controller, while write channel uses 13 of the 1st dma controller:
42 <&dmac0 13>;
|
| D | ste-dma40.txt | 75 13: UART port 0
80 18: USB OTG in/out endpoints 5 & 13
134 dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
135 <&dma 13 0 0x0>; /* Logical - MemToDev */
|
| D | atmel-xdma.txt | 13 - bit 13: SIF, source interface identifier, used to get the memory
35 - bit 13: SIF, source interface identifier, used to get the memory
|
| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | ad7879.txt | 15 13 : 2.560ms
45 interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
63 interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
|
| /Documentation/devicetree/bindings/usb/ |
| D | usb-nop-xceiv.txt | 35 vbus-detect-gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
43 GPIO 13 detects VBus insertion, and accordingly notifies the vbus-regulator.
|
| /Documentation/devicetree/bindings/serial/ |
| D | mrvl,pxa-ssp.txt | 27 dmas = <&dma 13
58 interrupts = <13>;
|
| /Documentation/devicetree/bindings/net/dsa/ |
| D | b53.txt | 56 - interrupts: a total of 13 interrupts must be specified, in the following
69 - interrupt-names: a total of 13 names matching the 13 interrupts specified
|
| /Documentation/devicetree/bindings/net/ |
| D | marvell-neta-bm.txt | 32 clocks = <&gateclk 13>;
46 clocks = <&gateclk 13>;
|
| /Documentation/media/uapi/dvb/ |
| D | fe-enable-high-lnb-voltage.rst | 38 - 0 - normal 13V and 18V.
40 - >0 - enables slightly higher voltages instead of 13/18V, in order
|
| /Documentation/devicetree/bindings/mailbox/ |
| D | ti,secure-proxy.txt | 46 # TX Thread ID is 13
48 <&secure_proxy 13>;
|
12345678910>>...17