Searched full:256 (Results 1 – 25 of 209) sorted by relevance
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| /Documentation/filesystems/ext4/ |
| D | blocks.rst | 42 - 256PiB
72 - 256TiB
75 - 256GiB
77 - 256TiB
134 - 256TiB
137 - 256GiB
139 - 256TiB
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| D | bigalloc.rst | 20 256 4k blocks. This shrinks the total size of the block allocation
21 bitmaps for a 2T file system from 64 megabytes to 256 kilobytes. It also
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| /Documentation/admin-guide/device-mapper/ |
| D | unstriped.rst | 48 CHUNK=256
88 in a 256k stripe across the two cores::
93 | LBA 0 | | LBA 256|
118 dmsetup create nvmset0 --table '0 512 unstriped 2 256 0 /dev/nvme0n1 0'
119 dmsetup create nvmset1 --table '0 512 unstriped 2 256 1 /dev/nvme0n1 0'
132 dmsetup create raid_disk0 --table '0 512 unstriped 4 256 0 /dev/mapper/striped 0'
133 dmsetup create raid_disk1 --table '0 512 unstriped 4 256 1 /dev/mapper/striped 0'
134 dmsetup create raid_disk2 --table '0 512 unstriped 4 256 2 /dev/mapper/striped 0'
135 dmsetup create raid_disk3 --table '0 512 unstriped 4 256 3 /dev/mapper/striped 0'
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| /Documentation/admin-guide/cifs/ |
| D | winucase_convert.pl | 31 for ($i = 0; $i < 256; $i++) {
34 printf("static const wchar_t t2_%2.2x[256] = {", $i);
35 for ($j = 0; $j < 256; $j++) {
46 printf("static const wchar_t *const toplevel[256] = {", $i);
47 for ($i = 0; $i < 256; $i++) {
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| /Documentation/xtensa/ |
| D | mmu.rst | 62 5. The parent-bus-address value is rounded down to the nearest 256MB boundary
64 6. The IO area covers the entire 256MB segment of parent-bus-address; the
107 | Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB
109 | Uncached KIO | XCHAL_KIO_BYPASS_VADDR 0xf0000000 256MB
113 256MB cached + 256MB uncached layout::
145 | Cached KSEG | XCHAL_KSEG_CACHED_VADDR 0xb0000000 256MB
147 | Uncached KSEG | XCHAL_KSEG_BYPASS_VADDR 0xc0000000 256MB
150 | Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB
152 | Uncached KIO | XCHAL_KIO_BYPASS_VADDR 0xf0000000 256MB
192 | Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB
[all …]
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| /Documentation/powerpc/ |
| D | pci_iov_resource_on_powernv.rst | 48 P8 supports up to 256 Partitionable Endpoints per PHB.
95 * It is divided into 256 segments of equal size. A table in the chip
98 the segment granularity is 2GB/256 = 8MB.
112 * Must be at least 256MB in size.
120 has 256 segments; however, there is no table for mapping a segment
188 - M32 window: There's one M32 window, and it is split into 256
189 equally-sized segments. The finest granularity possible is a 256MB
207 - Multiple segmented M64 windows: As usual, each window is split into 256
216 effectively reserve the entire 256 segments (256 * VF BAR size) and
224 divided into 256 segments, with each segment corresponding to one PE.
[all …]
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| /Documentation/media/uapi/v4l/ |
| D | pixfmt-meta-vsp1-hgo.rst | 32 additionally output the histogram with 64 or 256 bins, resulting in four
41 - In *256 bins normal mode*, the HGO operates on the Y channel to compute a
42 single 256-bins histogram. Only the YCbCr image format is supported.
43 - In *256 bins maximum mode*, the HGO operates on the maximum of the (R, G, B)
44 channels to compute a single 256-bins histogram. Only the RGB image format is
127 .. flat-table:: VSP1 HGO Data - 256 Bins, Normal Mode (1032 bytes)
152 .. flat-table:: VSP1 HGO Data - 256 Bins, Max Mode (1032 bytes)
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| /Documentation/driver-api/ |
| D | mtdnand.rst | 365 Hardware ECC generator providing 3 bytes ECC per 256 byte.
691 256 byte pagesize
718 256 Byte data in this page
720 256 Bytes of data in this page
722 256 Bytes of data in this page
724 256 Bytes of data in this page
731 256 Bytes of data in this page
733 256 Bytes of data in this page
750 256 Byte data in this page
752 256 Bytes of data in this page
[all …]
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| /Documentation/infiniband/ |
| D | user_mad.rst | 44 struct ib_user_mad + 256 bytes. For example:
53 mad = malloc(sizeof *mad + 256);
54 ret = read(fd, mad, sizeof *mad + 256);
55 if (ret != sizeof mad + 256) {
63 mad = malloc(sizeof *mad + 256);
64 ret = read(fd, mad, sizeof *mad + 256);
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| /Documentation/devicetree/bindings/crypto/ |
| D | samsung-slimsss.txt | 6 -- SHA-1/SHA-256 and (SHA-1/SHA-256)/HMAC
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| D | samsung-sss.txt | 8 -- SHA-1/SHA-256/MD5/HMAC (SHA-1/SHA-256/MD5)/PRNG
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| /Documentation/devicetree/bindings/mtd/ |
| D | fsmc-nand.txt | 25 one cycle, 255 means 256 cycles.
28 255 means 256 cycles.
30 command is asserted. Zero means one cycle, 255 means 256
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| /Documentation/ABI/testing/ |
| D | debugfs-pfo-nx-crypto | 36 - The total number of bytes hashed by the hardware using SHA-256.
39 - The total number of SHA-256 operations submitted to the hardware.
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| D | sysfs-bus-iio-potentiometer-mcp4531 | 8 Example: [0 1 256]
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| D | sysfs-bus-iio-dac-dpot-dac | 8 Example: [0 1 256]
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| /Documentation/devicetree/bindings/pci/ |
| D | v3-v360epc-pci.txt | 18 each be exactly 256MB (0x10000000) in size.
23 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked
46 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */
48 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */
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| /Documentation/translations/zh_CN/arm64/ |
| D | memory.txt | 36 分别都有 39-bit (512GB) 或 48-bit (256TB) 的虚拟地址空间。
57 0000000000000000 0000ffffffffffff 256TB 用户空间
58 ffff000000000000 ffffffffffffffff 256TB 内核空间
73 0000000000000000 0000ffffffffffff 256TB 用户空间
74 ffff000000000000 ffffffffffffffff 256TB 内核空间
114 0000004000000000 0000007fffffffff 256GB 在 HYP 中映射的内核对象
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | amlogic,meson-gpio-intc.txt | 5 a 256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge
6 or level and polarity. It does not expose all 256 mux inputs because the
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| /Documentation/virt/kvm/devices/ |
| D | mpic.txt | 16 Base address of the 256 KiB MPIC register space. Must be
45 This irqchip 0 has 256 interrupt pins, which expose the interrupts in
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| /Documentation/devicetree/bindings/media/ |
| D | cedrus.txt | 4 The VPU can only access the first 256 MiB of DRAM, that are DMA-mapped starting
36 /* Address must be kept in the lower 256 MiBs of DRAM for VE. */
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| /Documentation/crypto/ |
| D | api-samples.rst | 7 This code encrypts some data with AES-256-XTS. For sake of example,
21 u8 iv[16]; /* AES-256-XTS takes a 16-byte IV */
22 u8 key[64]; /* AES-256-XTS takes a 64-byte key */
162 char *drbg = "drbg_nopr_sha256"; /* Hash DRBG with SHA-256, no PR */
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| /Documentation/devicetree/bindings/mfd/ |
| D | qcom,spmi-pmic.txt | 13 16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
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| /Documentation/media/uapi/rc/ |
| D | keytable.c.rst | 121 for (j = 0; j < 256; j++) {
122 for (i = 0; i < 256; i++) {
175 for (j = 0; j < 256; j++) {
176 for (i = 0; i < 256; i++) {
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| /Documentation/devicetree/bindings/dma/ |
| D | arm-pl08x.txt | 27 64, 128 or 256 bytes are legal values
48 memcpy-burst-size = <256>;
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| /Documentation/devicetree/bindings/arm/socionext/ |
| D | cache-uniphier.txt | 33 cache-sets = <256>;
58 cache-line-size = <256>;
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