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/Documentation/networking/
D6pack.txt1 This is the 6pack-mini-HOWTO, written by
10 1. What is 6pack, and what are the advantages to KISS?
12 6pack is a transmission protocol for data exchange between the PC and
15 6pack has two major advantages:
28 (however, this feature is not supported yet by the Linux 6pack driver).
35 More details about 6pack are described in the file 6pack.ps that is located
38 2. Who has developed the 6pack protocol?
40 The 6pack protocol has been developed by Ekki Plicht DF4OR, Henning Rech
41 DF9IC and Gunter Jost DK7WJ. A driver for 6pack, written by Gunter Jost and
43 They have also written a firmware for TNCs to perform the 6pack
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D6lowpan.txt2 Netdev private dataroom for 6lowpan interfaces:
4 All 6lowpan able net devices, means all interfaces with ARPHRD_6LOWPAN,
11 Where LL_PRIV_6LOWPAN_DATA is sizeof linklayer 6lowpan private data struct.
22 wheres LOWPAN_LLTYPE_FOOBAR is a define for your 6LoWPAN linklayer type of
39 /* do 802.15.4 6LoWPAN handling here */
48 In case of generic 6lowpan branch ("net/6lowpan") you can remove the check
/Documentation/devicetree/bindings/pinctrl/
Dfsl,vf610-pinctrl.txt22 PAD_CTL_DSE_DISABLE (0 << 6)
23 PAD_CTL_DSE_150ohm (1 << 6)
24 PAD_CTL_DSE_75ohm (2 << 6)
25 PAD_CTL_DSE_50ohm (3 << 6)
26 PAD_CTL_DSE_37ohm (4 << 6)
27 PAD_CTL_DSE_30ohm (5 << 6)
28 PAD_CTL_DSE_25ohm (6 << 6)
29 PAD_CTL_DSE_20ohm (7 << 6)
Dfsl,imx6ul-pinctrl.txt8 "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller.
9 - fsl,pins: each entry consists of 6 integers and represents the mux and config
25 PAD_CTL_SPEED_LOW (0 << 6)
26 PAD_CTL_SPEED_MED (1 << 6)
27 PAD_CTL_SPEED_HIGH (3 << 6)
34 PAD_CTL_DSE_43ohm (6 << 3)
Dfsl,imx6sx-pinctrl.txt8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
24 PAD_CTL_SPEED_LOW (0 << 6)
25 PAD_CTL_SPEED_MED (1 << 6)
26 PAD_CTL_SPEED_HIGH (3 << 6)
33 PAD_CTL_DSE_43ohm (6 << 3)
Dfsl,imx6sll-pinctrl.txt8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
25 PAD_CTL_SPEED_LOW (0 << 6)
26 PAD_CTL_SPEED_MED (1 << 6)
27 PAD_CTL_SPEED_HIGH (3 << 6)
34 PAD_CTL_DSE_43ohm (6 << 3)
/Documentation/input/devices/
Delantech.rst24 5.2 Native absolute mode 6 byte packet format
28 6. Hardware version 3
30 6.2 Native absolute mode 6 byte packet format
35 7.2 Native absolute mode 6 byte packet format
41 8.2 Native relative mode 6 byte packet format
52 packet. Version 2 seems to be introduced with the EeePC and uses 6 bytes
54 and width of the touch. Hardware version 3 uses 6 bytes per packet (and
55 for 2 fingers the concatenation of two 6 bytes packets) and allows tracking
56 of up to 3 fingers. Hardware version 4 uses 6 bytes per packet, and can
61 separate packet format. It is also 6 bytes per packet.
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/Documentation/media/v4l-drivers/
Dsh_mobile_ceu_camera.rst30 | `. .6--
32 | . .6'-
52 S_FMT(width / height = (6') - (6))
64 (6) to (6') - CEU scale - user window
84 scale_comb = width_u / ((6') - (6))
95 6. Retrieve sensor output window (g_fmt)
127 Cropping is performed in the following 6 steps:
132 to 2 : 2', target crop 5 : 5', current output format 6' - 6.
140 5. Calculate and apply host scale = (6' - 6) / (4' - 4)
142 6. Calculate and apply host crop: 6 - 7 = (5 - 2) * (6' - 6) / (5' - 5)
/Documentation/dev-tools/
Dkmemleak.rst247 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk
248 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b a5 kkkkkkkkkkkkkkk.
/Documentation/leds/
Dleds-blinkm.rst25 $ ls -h /sys/class/leds/blinkm-6-*
26 /sys/class/leds/blinkm-6-9-blue:
29 /sys/class/leds/blinkm-6-9-green:
32 /sys/class/leds/blinkm-6-9-red:
35 (same is /sys/bus/i2c/devices/6-0009/leds)
42 $ cat blinkm-6-9-blue/brightness
45 $ echo 200 > blinkm-6-9-blue/brightness
49 $ echo heartbeat > blinkm-6-9-green/trigger
58 E.g. below /sys/bus/i2c/devices/6-0009/blinkm
60 $ ls -h /sys/bus/i2c/devices/6-0009/blinkm/
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/Documentation/hwmon/
Dmax34440.rst70 This driver supports hardware monitoring for Maxim MAX34440 PMBus 6-Channel
113 in[1-6]_label "vout[1-6]".
114 in[1-6]_input Measured voltage. From READ_VOUT register.
115 in[1-6]_min Minimum Voltage. From VOUT_UV_WARN_LIMIT register.
116 in[1-6]_max Maximum voltage. From VOUT_OV_WARN_LIMIT register.
117 in[1-6]_lcrit Critical minimum Voltage. VOUT_UV_FAULT_LIMIT register.
118 in[1-6]_crit Critical maximum voltage. From VOUT_OV_FAULT_LIMIT
120 in[1-6]_min_alarm Voltage low alarm. From VOLTAGE_UV_WARNING status.
121 in[1-6]_max_alarm Voltage high alarm. From VOLTAGE_OV_WARNING status.
122 in[1-6]_lcrit_alarm Voltage critical low alarm. From VOLTAGE_UV_FAULT
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Dmax31785.rst44 in[1-6]_crit Critical maximum output voltage
45 in[1-6]_crit_alarm Output voltage critical high alarm
46 in[1-6]_input Measured output voltage
47 in[1-6]_label "vout[18-23]"
48 in[1-6]_lcrit Critical minimum output voltage
49 in[1-6]_lcrit_alarm Output voltage critical low alarm
50 in[1-6]_max Maximum output voltage
51 in[1-6]_max_alarm Output voltage high alarm
52 in[1-6]_min Minimum output voltage
53 in[1-6]_min_alarm Output voltage low alarm
Dw83793.rst42 6 remote temperatures, up to 8 sets of PWM fan controls, SmartFan
44 sets of 6-pin CPU VID input.
50 temp5-6 have a 1 degree Celsiis resolution.
58 - If the value is 6, it starts monitoring using the temperature sensor
61 Temp5-6 can be connected to external thermistors (value of
62 temp[5-6]_type is 4).
76 to manual mode, you need to check the value of temp[1-6]_fan_map, make
77 sure bit 0 is cleared in the 6 values. And then set the pwm1 value to
82 mode using temp[1-6]_pwm_enable, 2 is Thermal Cruise mode and 3
/Documentation/media/uapi/rc/
Drc-protos.rst57 - 6 (inverted)
59 - 2nd start bit in rc5, re-used as 6th command bit
73 * - 6
80 where there the second stop bit is the 6th commmand bit, but inverted.
82 schemes. This bit is stored in bit 6 of the scancode, inverted. This is
117 * - 6
119 - 6 to 11
123 * - 6
168 * - 6
174 * - 6
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/Documentation/media/uapi/v4l/
Dsubdev-formats.rst186 - 6
894 - r\ :sub:`6`
902 - b\ :sub:`6`
910 - g\ :sub:`6`
968 - b\ :sub:`6`
976 - g\ :sub:`6`
984 - r\ :sub:`6`
1021 - b\ :sub:`6`
1056 - g\ :sub:`6`
1091 - r\ :sub:`6`
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Dpixfmt-packed-yuv.rst51 - 6
60 - 6
69 - 6
78 - 6
166 - a\ :sub:`6`
175 - Y'\ :sub:`6`
184 - Cb\ :sub:`6`
193 - Cr\ :sub:`6`
207 - a\ :sub:`6`
216 - Y'\ :sub:`6`
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Dpixfmt-packed-hsv.rst53 - 6
62 - 6
71 - 6
80 - 6
102 - h\ :sub:`6`
111 - s\ :sub:`6`
120 - v\ :sub:`6`
133 - h\ :sub:`6`
142 - s\ :sub:`6`
151 - v\ :sub:`6`
Dpixfmt-rgb.rst46 - 6
55 - 6
64 - 6
73 - 6
560 - b\ :sub:`6`
569 - g\ :sub:`6`
578 - r\ :sub:`6`
592 - r\ :sub:`6`
601 - g\ :sub:`6`
610 - b\ :sub:`6`
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Dpixfmt-srggb10-ipu3.rst26 to 32 bytes leaving 6 most significant bits padding in the last byte.
47 - G\ :sub:`0003low`\ (bits 7--6)
60 - G\ :sub:`0007low`\ (bits 7--6)
72 - G\ :sub:`0011low`\ (bits 7--6)
84 - G\ :sub:`0015low`\ (bits 7--6)
96 - G\ :sub:`0019low`\ (bits 7--6)
109 - G\ :sub:`0023low`\ (bits 7--6)
123 - R\ :sub:`0103low`\ (bits 7--6)
136 - R\ :sub:`0107low`\ (bits 7--6)
148 - R\ :sub:`0111low`\ (bits 7--6)
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/Documentation/core-api/
Dpacking.rst56 7 6 5 4
57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
72 7 6 5 4
73 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
85 4 5 6 7
86 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
99 4 5 6 7
100 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
108 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
111 7 6 5 4
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/Documentation/devicetree/bindings/crypto/
Dfsl-sec6.txt1 SEC 6 is as Freescale's Cryptographic Accelerator and Assurance Module (CAAM).
2 Currently Freescale powerpc chip C29X is embedded with SEC 6.
3 SEC 6 device tree binding include:
4 -SEC 6 Node
9 SEC 6 Node
13 Node defines the base address of the SEC 6 block.
15 configuration registers for the SEC 6 block.
16 For example, In C293, we could see three SEC 6 node.
48 address and length of the SEC 6 configuration registers.
64 fsl,sec-era = <6>;
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/Documentation/devicetree/bindings/arm/
Daxis.txt4 ARTPEC-6 ARM SoC
10 ARTPEC-6 System Controller
13 The ARTPEC-6 has a system controller with mixed functions controlling DMA, PCIe
26 ARTPEC-6 Development board:
/Documentation/powerpc/
Dvcpudispatch_stats.txt36 6. number of times this vcpu was dispatched in its home node (chip)
44 cpu1 2515 1274 1229 12 0 2509 6 0
46 cpu3 2259 1165 1088 6 0 2256 3 0
47 cpu4 2205 1143 1056 6 0 2202 3 0
48 cpu5 2165 1121 1038 6 0 2162 3 0
49 cpu6 2183 1127 1050 6 0 2180 3 0
50 cpu7 2193 1133 1052 8 0 2187 6 0
/Documentation/RCU/Design/Expedited-Grace-Periods/
DFunnel7.svg30 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"
44 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"
58 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"
72 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"
153 id="rect3101-3-6"
160 id="rect3101-3-6-7"
167 id="rect3101-3-6-7-5"
194 id="rect3101-3-6-9"
201 id="rect3101-3-6-7-1"
208 id="rect3101-3-6-7-5-2"
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DFunnel8.svg30 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"
44 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"
58 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"
72 …72895,0.01601326 8.7185884,-4.0017078 c -1.7454984,2.3720609 -1.7354408,5.6174519 -6e-7,8.035443 z"
153 id="rect3101-3-6"
160 id="rect3101-3-6-7"
167 id="rect3101-3-6-7-5"
194 id="rect3101-3-6-9"
201 id="rect3101-3-6-7-1"
208 id="rect3101-3-6-7-5-2"
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