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/Documentation/devicetree/bindings/powerpc/fsl/
Dcpus.txt2 Power Architecture CPU Binding
5 Power Architecture CPUs in Freescale SOCs are represented in device trees as
17 Freescale Power Architecture) defines the architecture for Freescale
18 Power CPUs. The EREF defines some architecture categories not defined
/Documentation/features/
Darch-support.txt2 For generic kernel features that need architecture support, the
8 | ok | # feature supported by the architecture
9 |TODO| # feature not yet supported by the architecture
Dlist-arch.sh3 # of an architecture.
5 # (If no arguments are given then it will print the host architecture's status.)
12 echo "# Kernel feature support matrix of the '$ARCH' architecture:"
/Documentation/admin-guide/
Dkernel-parameters.rst90 ARM ARM architecture is enabled.
91 ARM64 ARM64 architecture is enabled.
105 IA-64 IA-64 architecture is enabled.
106 IMA Integrity measurement architecture is enabled.
119 M68k M68k architecture is enabled.
123 MIPS MIPS architecture is enabled.
134 PARISC The PA-RISC architecture is enabled.
139 PPC PowerPC architecture is enabled.
144 S390 S390 architecture is enabled.
152 SH SuperH architecture is enabled.
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Dcputopology.rst12 socket number, but the actual value is architecture and platform
19 architecture and platform dependent.
25 architecture and platform dependent.
31 architecture and platform dependent.
37 architecture and platform dependent.
87 Architecture-neutral, drivers/base/topology.c, exports these attributes.
94 For an architecture to support this feature, it must define some of
/Documentation/powerpc/
Disa-versions.rst8 CPU Architecture version
19 Power5 - PowerPC User Instruction Set Architecture Book I v2.02
20 - PowerPC Virtual Environment Architecture Book II v2.02
21 - PowerPC Operating Environment Architecture Book III v2.02
22 PPC970 - PowerPC User Instruction Set Architecture Book I v2.01
23 - PowerPC Virtual Environment Architecture Book II v2.01
24 - PowerPC Operating Environment Architecture Book III v2.01
/Documentation/
Dirqflags-tracing.txt15 CONFIG_PROVE_RWSEM_LOCKING will be offered on an architecture - these
19 Architecture support for this is certainly not in the "trivial"
21 state changes. But an architecture can be irq-flags-tracing enabled in a
42 - if the architecture has non-maskable interrupts then those need to be
47 implementation in an architecture: lockdep will detect that and will
/Documentation/virt/kvm/
Dhypercalls.txt40 2. Architecture(s)
46 Architecture: x86
53 Architecture: x86
60 Architecture: PPC
69 Architecture: PPC
78 Architecture: x86
93 Architecture: x86
127 Architecture: x86
147 Architecture: x86
/Documentation/devicetree/bindings/arm/ti/
Dk3.txt1 Texas Instruments K3 Multicore SoC architecture device tree bindings
4 Platforms based on Texas Instruments K3 Multicore SoC architecture
11 architecture it uses, using one of the following compatible values:
/Documentation/vm/
Dmemory-model.rst18 FLATMEM, DISCONTIGMEM and SPARSEMEM. Each architecture defines what
49 To allocate the `mem_map` array, architecture specific setup code
55 If an architecture enables `CONFIG_ARCH_HAS_HOLES_MEMORYMODEL` option,
57 actual physical pages. In such case, the architecture specific
80 The architecture setup code should call :c:func:`free_area_init_node` for
120 `MAX_PHYSMEM_BITS` constants defined by each architecture that
122 physical address that an architecture supports, the
145 The architecture setup code should call :c:func:`memory_present` for
167 To use vmemmap, an architecture has to reserve a range of virtual
170 the architecture should implement :c:func:`vmemmap_populate` method
[all …]
Dsplit_page_table_lock.rst38 tables and the architecture supports it (see below).
54 Support of split page table lock by an architecture
61 Make sure the architecture doesn't use slab allocator for page table
/Documentation/ABI/stable/
Dsyscalls7 Note that this interface is different for every architecture
8 that Linux supports. Please see the architecture-specific
/Documentation/arm64/
Dlegacy_instructions.rst7 the architecture. The infrastructure code uses undefined instruction
19 have been obsoleted in the architecture, e.g., SWP
39 architecture. Deprecated instructions should default to emulation
/Documentation/timers/
Dhighres.rst48 code out of the architecture-specific areas into a generic management
49 framework, as illustrated in figure #3 (OLS slides p. 18). The architecture
76 for various event driven functionalities is hardwired into the architecture
80 architecture. Another implication of the current design is that it is necessary
81 to touch all the architecture-specific implementations in order to provide new
87 to minimize the clock event related architecture dependent code to the pure
93 Clock event devices are registered either by the architecture dependent boot
116 architecture specific timer interrupt handlers and hands the control over the
131 The conversion of an architecture has no functional impact, but allows to
135 adding the kernel/time/Kconfig file to the architecture specific Kconfig and
Dtimekeeping.rst10 If you grep through the kernel source you will find a number of architecture-
12 architecture-specific overrides of the sched_clock() function and some
113 number of nanoseconds since the system was started. An architecture may or
133 If an architecture does not provide its own implementation of this function,
135 jiffy frequency for the architecture. This will affect scheduling accuracy
148 architecture, special helper functions have been created to provide a
/Documentation/usb/
Dlinux.inf19 ; Decoration for x86 architecture
23 ; Decoration for x64 architecture
27 ; Decoration for ia64 architecture
/Documentation/devicetree/bindings/watchdog/
Dsbsa-gwdt.txt1 * SBSA (Server Base System Architecture) Generic Watchdog
6 Base System Architecture (SBSA)
/Documentation/nios2/
Dnios2.rst2 Linux on the Nios II architecture
17 Nios II is a 32-bit embedded-processor architecture designed specifically for the
/Documentation/scsi/
Dufs.txt9 2. UFS Architecture Overview
42 2. UFS Architecture Overview
45 UFS has a layered communication architecture which is based on SCSI
48 UFS communication architecture consists of following layers,
83 UIC is the lowest layer of UFS layered architecture. It handles
/Documentation/arm/samsung/
Dgpio.rst8 This outlines the Samsung GPIO implementation and the architecture
33 Pin configuration is specific to the Samsung architecture, with each SoC
/Documentation/core-api/
Dgenericirq.rst22 interrupt subsystem based for their architecture, with the help of the
67 Analysing a couple of architecture's IRQ subsystem implementations
81 and extensible. For example, an (sub)architecture can use a generic
83 (sub)architecture specific 'edge type' implementation.
118 Whenever an interrupt triggers, the low-level architecture code calls
171 The interrupt flow handlers (either pre-defined or architecture
172 specific) are assigned to specific interrupts by the architecture either
319 which have no platform-specific IRQ handling quirks. If an architecture
383 The locking of chip registers is up to the architecture that defines the
/Documentation/x86/x86_64/
Dmachinecheck.rst81 For more details about the x86 machine check architecture
82 see the Intel and AMD architecture manuals from their developer websites.
84 For more details about the architecture see
/Documentation/kbuild/
Dmakefiles.rst35 === 6 Architecture Makefiles
36 --- 6.1 Set variables to tweak the build to the architecture
40 --- 6.5 Architecture-specific boot images
80 architecture-specific information to the top Makefile.
107 *Arch developers* are people who work on an entire architecture, such
401 Another example are the architecture-specific Makefiles which
549 This functionality is useful for architecture Makefiles that try
769 but in the architecture makefiles where the kbuild infrastructure
800 6 Architecture Makefiles
807 for said architecture.
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Dheaders_install.rst30 ARCH indicates which architecture to produce headers for, and defaults to the
31 current architecture. The linux/asm directory of the exported kernel headers
/Documentation/admin-guide/device-mapper/
Dswitch.rst19 frameless architecture. In this architecture, the storage group
33 This architecture simplifies the management and configuration of both
43 device onto different targets. However in this architecture the LUN is

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