Home
last modified time | relevance | path

Searched +full:bit +full:- +full:banging (Results 1 – 7 of 7) sorted by relevance

/Documentation/devicetree/bindings/iio/adc/
Davia-hx711.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: "http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Andreas Klinger <ak@it-klinger.de>
13 Bit-banging driver using two GPIOs:
14 - sck-gpio gives a clock to the sensor with 24 cycles for data retrieval
17 - dout-gpio is the sensor data the sensor responds to the clock
25 - avia,hx711
27 sck-gpios:
[all …]
/Documentation/devicetree/bindings/iio/proximity/
Ddevantech-srf04.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/proximity/devantech-srf04.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andreas Klinger <ak@it-klinger.de>
13 Bit-banging driver using two GPIOs:
14 - trigger-gpio is raised by the driver to start sending out an ultrasonic
16 - echo-gpio is held high by the sensor after sending ultrasonic burst
20 http://www.robot-electronics.co.uk/htm/srf04tech.htm
22 http://www.maxbotix.com/documents/LV-MaxSonar-EZ_Datasheet.pdf
[all …]
/Documentation/misc-devices/
Dc2port.txt2 ---------------
19 --------
22 C2 Interface used for in-system programming of micro controllers.
24 By using this driver you can reprogram the in-system flash without EC2
29 ----------
34 - AN127: FLASH Programming via the C2 Interface at
37 - C2 Specification at
40 however it implements a two wire serial communication protocol (bit
41 banging) designed to enable in-system programming, debugging, and
42 boundary-scan testing on low pin-count Silicon Labs devices. Currently
[all …]
/Documentation/driver-api/gpio/
Dintro.rst16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
17 and is described by all the files in this directory excepted gpio-legacy.txt.
18 - The legacy integer-based interface which is considered deprecated (but still
19 usable for compatibility reasons) is documented in gpio-legacy.txt.
21 The remainder of this document applies to the new descriptor-based interface.
22 gpio-legacy.txt contains the same information applied to the legacy
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
32 represents a bit connected to a particular pin, or "ball" on Ball Grid Array
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
[all …]
Ddrivers-on-gpio.rst6 the right in-kernel and userspace APIs/ABIs for the job, and that these
10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
13 - ledtrig-gpio: drivers/leds/trigger/ledtrig-gpio.c will provide a LED trigger,
15 (and that LED may in turn use the leds-gpio as per above).
17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
20 - gpio-keys-polled: drivers/input/keyboard/gpio_keys_polled.c is used when your
24 - gpio_mouse: drivers/input/mouse/gpio_mouse.c is used to provide a mouse with
29 - gpio-beeper: drivers/input/misc/gpio-beeper.c is used to provide a beep from
32 - extcon-gpio: drivers/extcon/extcon-gpio.c is used when you need to read an
36 - restart-gpio: drivers/power/reset/gpio-restart.c is used to restart/reboot
[all …]
/Documentation/PCI/
Dpci.rst1 .. SPDX-License-Identifier: GPL-2.0
7 :Authors: - Martin Mares <mj@ucw.cz>
8 - Grant Grundler <grundler@parisc-linux.org>
11 Since each CPU architecture implements different chip-sets and PCI devices
18 by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman.
22 However, keep in mind that all documents are subject to "bit rot".
26 "Linux PCI" <linux-pci@atrey.karlin.mff.cuni.cz> mailing list.
38 supporting hot-pluggable PCI, CardBus, and Express-Card in a single driver].
45 - Enable the device
46 - Request MMIO/IOP resources
[all …]
Dpci-error-recovery.rst1 .. SPDX-License-Identifier: GPL-2.0
8 :Authors: - Linas Vepstas <linasvepstas@gmail.com>
9 - Richard Lary <rlary@us.ibm.com>
10 - Mike Mason <mmlnx@us.ibm.com>
16 chipsets are able to deal with these errors; these include PCI-E chipsets,
17 and the PCI-host bridges found on IBM Power4, Power5 and Power6-based
32 including multiple instances of a device driver on multi-function
34 waiting for some i/o-space register to change, when it never will.
39 is forced by the need to handle multi-function devices, that is,
42 of reset it desires, the choices being a simple re-enabling of I/O
[all …]