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/Documentation/devicetree/bindings/arm/
Dqcom.yaml42 cdp
59 "qcom,msm8916-v1-cdp-pm8916-v2.1"
61 A CDP board with an msm8916 SoC, version 1 paired with a pm8916 PMIC of version
102 - qcom,msm8960-cdp
/Documentation/devicetree/bindings/power/supply/
Dgpio-charger.txt14 usb-cdp (USB charging downstream port)
/Documentation/x86/
Dresctrl_ui.rst23 CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2"
31 # mount -t resctrl resctrl [-o cdp[,cdpl2][,mba_MBps]] /sys/fs/resctrl
35 "cdp":
43 L2 and L3 CDP are controlled separately.
412 With CDP disabled the L3 schemata format is::
416 L3 schemata file details (CDP enabled via mount option to resctrl)
418 When CDP is enabled L3 control is split into two separate resources
426 CDP is supported at L2 using the 'cdpl2' mount option. The schemata
/Documentation/ABI/testing/
Dsysfs-class-power498 Valid values: "Unknown", "SDP", "DCP", "CDP", "ACA", "C", "PD",