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/Documentation/devicetree/bindings/pinctrl/
Dcirrus,lochnagar.txt47 codec-aif1, codec-aif2, codec-aif3, dsp-aif1, dsp-aif2, psia1,
54 codec-gpio5, codec-gpio6, codec-gpio7, codec-gpio8, dsp-gpio1,
55 dsp-gpio2, dsp-gpio3, dsp-gpio4, dsp-gpio5, dsp-gpio6, gf-gpio2,
60 codec-aif3-txdat, dsp-aif1-bclk, dsp-aif1-rxdat, dsp-aif1-lrclk,
61 dsp-aif1-txdat, dsp-aif2-bclk, dsp-aif2-rxdat,
62 dsp-aif2-lrclk, dsp-aif2-txdat, psia1-bclk, psia1-rxdat,
68 gf-aif2-txdat, dsp-uart1-rx, dsp-uart1-tx, dsp-uart2-rx,
69 dsp-uart2-tx, gf-uart2-rx, gf-uart2-tx, usb-uart-rx,
73 dsp-dmicclk1, dsp-dmicdat1, dsp-dmicclk2, dsp-dmicdat2, i2c2-scl,
74 i2c2-sda, i2c3-scl, i2c3-sda, i2c4-scl, i2c4-sda, dsp-standby,
[all …]
/Documentation/devicetree/bindings/remoteproc/
Dti,davinci-rproc.txt1 TI Davinci DSP devices
7 The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
13 controller, a dedicated local power/sleep controller etc. The DSP processor
14 core used in Davinci SoCs is usually a C674x DSP CPU.
16 DSP Device Node:
18 Each DSP Core sub-system is represented as a single DT node.
25 "ti,da850-dsp" for DSPs on OMAP-L138 SoCs
38 interrupts from the DSP. The value should follow the
52 /* DSP Reserved Memory node */
58 dsp_memory_region: dsp-memory@c3000000 {
[all …]
Dti,keystone-rproc.txt1 TI Keystone DSP devices
4 The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core
10 a dedicated local power/sleep controller etc. The DSP processor core in
13 DSP Device Node:
15 Each DSP Core sub-system is represented as a single DT node, and should also
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs
28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs
29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs
42 State Control node, and the register offset of the DSP
[all …]
/Documentation/devicetree/bindings/gpio/
Dgpio-dsp-keystone.txt1 Keystone 2 DSP GPIO controller bindings
3 HOST OS userland running on ARM can send interrupts to DSP cores using
4 the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP core.
7 For example TCI6638K2K SoC has 8 DSP GPIO controllers:
10 Keystone 2 DSP GPIO controller has specific features:
12 - setting GPIO value to 1 causes IRQ generation on target DSP core;
17 - compatible: should be "ti,keystone-dsp-gpio"
29 compatible = "ti,keystone-dsp-gpio";
/Documentation/devicetree/bindings/arm/omap/
Ddsp.txt1 * TI - DSP (Digital Signal Processor)
3 TI DSP included in OMAP SoC
7 - ti,hwmods: "dsp"
11 dsp {
13 ti,hwmods = "dsp";
/Documentation/hwmon/
Dlochnagar.rst33 in1_input Measured voltage for 1V8 DSP (milliVolts)
34 in1_label "1V8 DSP"
35 curr2_input Measured current for 1V8 DSP (milliAmps)
36 curr2_label "1V8 DSP"
37 power2_average Measured average power for 1V8 DSP (microWatts)
39 power2_label "1V8 DSP"
47 in3_input Measured voltage for VDDCORE DSP (milliVolts)
48 in3_label "VDDCORE DSP"
49 curr4_input Measured current for VDDCORE DSP (milliAmps)
50 curr4_label "VDDCORE DSP"
[all …]
/Documentation/devicetree/bindings/dsp/
Dfsl,dsp.yaml4 $id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml#
7 title: NXP i.MX8 DSP core
13 Some boards from i.MX8 family contain a DSP core used for
19 - fsl,imx8qxp-dsp
58 used by DSP (see bindings/reserved-memory/reserved-memory.txt)
75 dsp@596e8000 {
76 compatible = "fsl,imx8qxp-dsp";
/Documentation/devicetree/bindings/iommu/
Dti,omap-iommu.txt7 "ti,dra7-dsp-iommu" for DRA7xx DSP IOMMU instances
27 is required for DSP IOMMU instances on DRA7xx SoCs. The
28 instance number should be 0 for DSP MDMA MMUs and 1 for
29 DSP EDMA MMUs.
44 compatible = "ti,dra7-dsp-iommu";
53 compatible = "ti,dra7-dsp-iommu";
/Documentation/sound/soc/
Ddpcm.rst10 digital audio to I2S DAI0, I2S DAI1 or PDM DAI2. This is useful for on SoC DSP
15 graph representing the DSP internal audio paths and uses the mixer settings to
22 Phone Audio System with SoC based DSP
29 | Front End PCMs | SoC DSP | Back End DAIs | Audio devices |
35 * DSP *
47 modem. This sound card exposes 4 DSP front end (FE) ALSA PCM devices and
66 * DSP *
83 * DSP *
130 | Front End PCMs | SoC DSP | Back End DAIs | Audio devices |
136 * DSP *
[all …]
Dplatform.rst6 drivers and DSP drivers. The platform drivers only target the SoC CPU and must
68 SoC DSP Drivers
71 Each SoC DSP driver usually supplies the following features :-
75 3. DMA IO to/from DSP buffers (if applicable)
76 4. Definition of DSP front end (FE) PCM devices.
Dcodec-to-codec.rst64 .name = "CPU-DSP",
65 .stream_name = "CPU-DSP",
76 .name = "DSP-CODEC",
77 .stream_name = "DSP-CODEC",
Ddapm.rst109 Inter widget audio data buffer within a DSP.
111 DSP internal scheduler that schedules component/pipeline processing
116 Sample Rate Converter within DSP or CODEC
118 Asynchronous Sample Rate Converter within DSP or CODEC
200 machine audio component (non codec or DSP) that can be independently
245 Codec/DSP Widget Interconnections
252 This is easiest with a diagram of the codec or DSP (and schematic of the machine
/Documentation/devicetree/bindings/misc/
Dqcom,fastrpc.txt5 invocations across DSP and APPS boundaries. This enables developers
6 to offload tasks to the DSP and free up the application processor for
17 Definition: should specify the dsp domain name this fastrpc
32 on the dsp.
61 qcom,smd-channels = "fastrpcsmd-apps-dsp";
/Documentation/sound/designs/
Dcompress-offload.rst17 In recent years, audio digital signal processors (DSP) were integrated
68 streaming compressed data to a DSP, with the assumption that the
75 DSP, eg. Android HAL or PulseAudio sinks. By construction, regular
95 is transmitted to the audio DSP. DMA transfers from main memory to an
132 This routines returns the actual settings used by the DSP. Changes to
140 refilled or the delay due to decoding/encoding/io on the DSP.
165 So we need to pass this to DSP. This metadata is extracted from ID3/MP4 headers
167 interface to pass this information to the DSP. Also DSP and userspace needs to
178 This routine tells DSP that metadata and write operation sent after this would
182 This is called when end of file is reached. The userspace can inform DSP that
[all …]
/Documentation/devicetree/bindings/dma/
Dste-dma40.txt86 24: Multimedia DSP SXA0
87 25: Multimedia DSP SXA1
88 26: Multimedia DSP SXA2
89 27: Multimedia DSP SXA3
106 44: Multimedia DSP SXA4
107 45: Multimedia DSP SXA5
108 46: SLIMbus channel 8 or Multimedia DSP SXA6
109 47: SLIMbus channel 9 or Multimedia DSP SXA7
/Documentation/devicetree/bindings/powerpc/nintendo/
Dgamecube.txt45 1.c) The Digital Signal Procesor (DSP) node
52 - compatible : should be "nintendo,flipper-dsp"
53 - reg : should contain the DSP registers location and length
54 - interrupts : should contain the DSP interrupt
60 The ARAM node must be placed under the DSP node.
Dwii.txt56 1.c) The Digital Signal Procesor (DSP) node
63 - compatible : should be "nintendo,hollywood-dsp","nintendo,flipper-dsp"
64 - reg : should contain the DSP registers location and length
65 - interrupts : should contain the DSP interrupt
/Documentation/devicetree/bindings/interrupt-controller/
Dti,keystone-irq.txt3 On Keystone SOCs, DSP cores can send interrupts to ARM
5 The IRQ handler running on HOST OS can identify DSP signal source by
/Documentation/devicetree/bindings/clock/ti/davinci/
Dpsc.txt53 dsp: dsp@11800000 {
54 compatible = "ti,da850-dsp";
/Documentation/devicetree/bindings/timer/
Dti,timer.txt29 - ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in
/Documentation/devicetree/bindings/sound/
Dqcom,q6core.txt14 from DSP.
Damlogic,axg-pdm.txt13 * "sysclk" : dsp system clock
/Documentation/devicetree/bindings/reset/
Dti,sci-reset.txt47 consumer (a DSP device) on the 66AK2G SoC.
58 dsp0: dsp@10800000 {
/Documentation/w1/masters/
Dmxc-w1.rst12 …- http://cache.freescale.com/files/dsp/doc/archive/MCIMX27.pdf?fsrch=1&WT_TYPE=Data%20Sheets&WT_VE…
/Documentation/devicetree/bindings/clock/
Dcirrus,lochnagar.txt38 - ln-dsp-clkout : Output clock from DSP card.

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