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/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-emmc.txt1 * The simple eMMC hardware reset provider
3 The purpose of this driver is to perform standard eMMC hw reset
6 fix possible issues if bootloader has left eMMC card in initialized or
9 doesn't have hardware reset logic connected to emmc card and (limited or
10 broken) ROM bootloaders are unable to read second stage from the emmc
14 - compatible : contains "mmc-pwrseq-emmc".
16 and then deasserted to perform eMMC card reset. To perform
23 compatible = "mmc-pwrseq-emmc";
Dallwinner,sun4i-a10-mmc.yaml25 - const: allwinner,sun8i-a83t-emmc
27 - const: allwinner,sun50i-a64-emmc
33 - const: allwinner,sun8i-r40-emmc
34 - const: allwinner,sun50i-a64-emmc
39 - const: allwinner,sun50i-h5-emmc
40 - const: allwinner,sun50i-a64-emmc
45 - const: allwinner,sun50i-h6-emmc
46 - const: allwinner,sun50i-a64-emmc
Dmarvell,xenon-sdhci.txt46 To select eMMC 5.1 PHY, set:
47 marvell,xenon-phy-type = "emmc 5.1 phy"
48 eMMC 5.1 PHY is the default choice if this property is not provided.
49 To select eMMC 5.0 PHY, set:
50 marvell,xenon-phy-type = "emmc 5.0 phy"
52 All those types of PHYs can support eMMC, SD and SDIO.
55 For example, "emmc 5.1 phy" doesn't mean that this Xenon SDHC only
56 supports eMMC 5.1.
60 Only available for eMMC PHY.
66 Only available for eMMC PHY.
[all …]
Dmmc-controller.yaml45 Non-removable slot (like eMMC); assume always present.
163 eMMC hardware reset is supported
178 eMMC high-speed DDR mode (1.2V I/O) is supported.
183 eMMC high-speed DDR mode (1.8V I/O) is supported.
188 eMMC high-speed DDR mode (3.3V I/O) is supported.
193 eMMC HS200 mode (1.2V I/O) is supported.
198 eMMC HS200 mode (1.8V I/O) is supported.
203 eMMC HS400 mode (1.2V I/O) is supported.
208 eMMC HS400 mode (1.8V I/O) is supported.
213 eMMC HS400 enhanced strobe mode is supported
[all …]
Dsdhci-st.txt22 - pinctrl-0: Phandle referencing pin configuration of the sd/emmc controller.
32 for eMMC on stih407 family silicon to configure DLL inside FlashSS.
49 supply in eMMC/SD specs.
62 /* Example stih416e eMMC configuration */
91 /* Example eMMC stih407 family configuration */
Darasan,sdhci.txt16 - "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1": rk3399 eMMC PHY
20 - "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY
86 emmc: sdhci@ec700000 {
87 compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1";
Dmmc-card.txt1 mmc-card / eMMC bindings
5 child node describing a mmc-card / an eMMC, see "Use of Function subnodes"
Dsdhci-cadence.txt1 * Cadence SD/SDIO/eMMC Host Controller
12 For eMMC configuration, supported speed modes are not indicated by the SDHCI
49 Value of the delay in the input path for eMMC high-speed DDR timing
70 emmc: sdhci@5a000000 {
Damlogic,meson-gx.txt1 Amlogic SD / eMMC controller for S905/GXBB family SoCs
4 interface for SD, eMMC and SDIO devices.
Dhi3798cv200-dw-mshc.txt7 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
24 emmc: mmc@9830000 {
Duniphier-sd.txt1 UniPhier SD/eMMC controller
14 "hw" - should exist if eMMC hw reset line is available
Dmmci.txt13 as the VCC/VDD supply in the eMMC/SD specs.
21 as the VCCQ/VDD_IO supply in the eMMC/SD specs.
Dsocfpga-dw-mshc.txt5 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
Dimg-dw-mshc.txt5 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
Dbluefield-dw-mshc.txt7 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
Dzx-dw-mshc.txt5 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
Dbrcm,sdhci-iproc.txt13 Use brcm2835-sdhci for the eMMC controller on the BCM2835 (Raspberry Pi) and
/Documentation/driver-api/mmc/
Dmmc-tools.rst16 - Determine the eMMC writeprotect status.
17 - Set the eMMC writeprotect status.
18 - Set the eMMC data sector size to 4KB by disabling emulation.
25 - Enable the eMMC BKOPS feature.
26 - Permanently enable the eMMC H/W Reset feature.
27 - Permanently disable the eMMC H/W Reset feature.
33 - Enable the eMMC cache feature.
34 - Disable the eMMC cache feature.
/Documentation/devicetree/bindings/phy/
Drockchip-emmc-phy.txt1 Rockchip EMMC PHY
5 - compatible: rockchip,rk3399-emmc-phy
31 compatible = "rockchip,rk3399-emmc-phy";
/Documentation/devicetree/bindings/mtd/
Damlogic,meson-nand.txt16 "device" - device clock from eMMC sub clock controller
20 - amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC
/Documentation/devicetree/bindings/arm/
Dmediatek.yaml69 - mediatek,mt7623a-rfb-emmc
71 - mediatek,mt7623n-rfb-emmc
Dsunxi.yaml356 - description: Lichee Zero Plus (with S3, without eMMC/SPI Flash)
527 - description: Olimex A20-Olimex SOM Evaluation Board (with eMMC)
529 - const: olimex,a20-olimex-som-evb-emmc
542 - description: Olimex A20-OlinuXino LIME2 (with eMMC)
544 - const: olimex,a20-olinuxino-lime2-emmc
552 - description: Olimex A20-OlinuXino Micro (with eMMC)
554 - const: olimex,a20-olinuxino-micro-emmc
562 - description: Olimex A20-SOM204 Evaluation Board (with eMMC)
564 - const: olimex,a20-olimex-som204-evb-emmc
577 - description: Olimex A64-OlinuXino (with eMMC)
[all …]
/Documentation/block/
Dcmdline-partition.rst8 It is typically used for fixed block (eMMC) embedded devices.
44 eMMC disk names are "mmcblk0" and "mmcblk0boot0".
/Documentation/devicetree/bindings/clock/
Dcalxeda.txt13 "calxeda,hb-emmc-clock" - Divided clock for MMC/SD controller.
/Documentation/devicetree/bindings/dma/
Duniphier-mio-dmac.txt3 This works as an external DMA engine for SD/eMMC controllers etc.

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