Searched full:freescale (Results 1 – 25 of 222) sorted by relevance
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| /Documentation/w1/masters/ |
| D | mxc-w1.rst | 7 * Freescale MX27, MX31 and probably other i.MX SoCs
11 - http://www.freescale.com/files/32bit/doc/data_sheet/MCIMX31.pdf?fpsp=1
12 …- http://cache.freescale.com/files/dsp/doc/archive/MCIMX27.pdf?fsrch=1&WT_TYPE=Data%20Sheets&WT_VE…
16 Originally based on Freescale code, prepared for mainline by
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| /Documentation/devicetree/bindings/board/ |
| D | fsl-board.txt | 1 Freescale Reference Board Bindings
4 exist on some Freescale reference boards.
20 * Freescale on-board FPGA
50 * Freescale BCSR GPIO banks
80 * Freescale on-board FPGA connected on I2C bus
82 Some Freescale boards like BSC9132QDS have on board FPGA connected on
97 * Freescale on-board CPLD
99 Some Freescale boards like T1040RDB have an on board CPLD connected.
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | cpus.txt | 3 Copyright 2013 Freescale Semiconductor Inc.
5 Power Architecture CPUs in Freescale SOCs are represented in device trees as
17 Freescale Power Architecture) defines the architecture for Freescale
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| D | cache_sram.txt | 1 * Freescale PQ3 and QorIQ based Cache SRAM
3 Freescale's mpc85xx and some QorIQ platforms provide an
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| D | diu.txt | 1 * Freescale Display Interface Unit
3 The Freescale DIU is a LCD controller, with proper hardware, it can also
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| D | dma.txt | 1 * Freescale DMA Controllers
3 ** Freescale Elo DMA Controller
4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
68 ** Freescale EloPlus DMA Controller
70 mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
128 ** Freescale Elo3 DMA Controller
130 channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
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| D | msi-pic.txt | 1 * Freescale MSI interrupt controller
81 The Freescale hypervisor and msi-address-64
84 Freescale MSI driver calculates the address of MSIIR (in the MSI register
88 mapping for MSIIR. The Freescale ePAPR hypervisor has this requirement
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| D | mpic.txt | 2 Freescale MPIC Interrupt Controller Node
3 Copyright (C) 2010,2011 Freescale Semiconductor Inc.
6 The Freescale MPIC interrupt controller is found on all PowerQUICC
17 Definition: Shall include "fsl,mpic". Freescale MPIC
71 non-IPI interrupts to a single CPU at a time (EG: Freescale MPIC).
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| /Documentation/devicetree/bindings/nvmem/ |
| D | snvs-lpgpr.txt | 9 "fsl,imx6q-snvs-lpgpr" for Freescale i.MX6Q/D/DL/S
10 "fsl,imx6ul-snvs-lpgpr" for Freescale i.MX6UL
11 "fsl,imx7d-snvs-lpgpr" for Freescale i.MX7D/S
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| /Documentation/devicetree/bindings/sound/ |
| D | fsl-asoc-card.txt | 1 Freescale Generic ASoC Sound Card with ASRC support
3 The Freescale Generic ASoC Sound Card can be used, ideally, for all Freescale
7 for Freescale SoCs (especially those released in recent years), most of them
12 So having this generic sound card allows all Freescale SoC users to benefit
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| /Documentation/ABI/testing/ |
| D | sysfs-platform-chipidea-usb-otg | 3 Contact: Li Jun <b47624@freescale.com>
20 Contact: Li Jun <b47624@freescale.com>
35 Contact: Li Jun <b47624@freescale.com>
50 Contact: Li Jun <b47624@freescale.com>
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| /Documentation/devicetree/bindings/iio/dac/ |
| D | vf610-dac.txt | 1 Freescale vf610 Digital to Analog Converter bindings
4 vf610 SoCs from Freescale.
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| /Documentation/devicetree/bindings/serial/ |
| D | fsl-mxs-auart.txt | 1 * Freescale MXS Application UART (AUART)
5 "fsl,imx23-auart" - Freescale i.MX23
6 "fsl,imx28-auart" - Freescale i.MX28
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| /Documentation/devicetree/bindings/mmc/ |
| D | mxs-mmc.txt | 1 * Freescale MXS MMC controller
3 The Freescale MXS Synchronous Serial Ports (SSP) can act as a MMC controller
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| /Documentation/devicetree/bindings/pci/ |
| D | fsl,pci.txt | 1 * Bus Enumeration by Freescale PCI-X Agent
3 Typically any Freescale PCI-X bridge hardware strapped into Agent mode
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| D | 83xx-512x-pci.txt | 1 * Freescale 83xx and 512x PCI bridges
3 Freescale 83xx and 512x SOCs include the same PCI bridge core.
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| /Documentation/devicetree/bindings/dma/ |
| D | mpc512x-dma.txt | 1 * Freescale MPC512x and MPC8308 DMA Controller
3 The DMA controller in Freescale MPC512x and MPC8308 SoCs can move
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx8mm-pinctrl.txt | 1 * Freescale IMX8MM IOMUX Controller
15 <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last integer CONFIG is
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| D | fsl,imx8mn-pinctrl.txt | 1 * Freescale IMX8MN IOMUX Controller
15 <arch/arm64/boot/dts/freescale/imx8mn-pinfunc.h>. The last integer CONFIG is
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| /Documentation/devicetree/bindings/display/imx/ |
| D | fsl-imx-drm.txt | 1 Freescale i.MX DRM master device
4 The freescale i.MX DRM master device is a virtual device needed to list all
20 Freescale i.MX IPUv3
62 Freescale i.MX PRE (Prefetch Resolve Engine)
88 Freescale i.MX PRG (Prefetch Resolve Gasket)
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| /Documentation/devicetree/bindings/ata/ |
| D | imx-sata.txt | 1 * Freescale i.MX AHCI SATA Controller
3 The Freescale i.MX SATA controller mostly conforms to the AHCI interface
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | vf610-adc.txt | 1 Freescale vf610 Analog to Digital Converter bindings
4 vf610/i.MX6slx and upward SoCs from Freescale.
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| /Documentation/devicetree/bindings/misc/ |
| D | fsl,qoriq-mc.txt | 1 * Freescale Management Complex
3 The Freescale Management Complex (fsl-mc) is a hardware resource
13 Documentation/networking/device_drivers/freescale/dpaa2/overview.rst
35 Definition: Must be "fsl,qoriq-mc". A Freescale Management Complex
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| /Documentation/driver-api/mtd/ |
| D | spi-nor.rst | 10 controllers (such as Freescale's QuadSPI controller) cannot easily handle
13 In particular, Freescale's QuadSPI controller must know the NOR commands to
48 With the SPI NOR controller driver (Freescale QuadSPI), it looks like:
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| /Documentation/virt/kvm/devices/ |
| D | mpic.txt | 5 KVM_DEV_TYPE_FSL_MPIC_20 Freescale MPIC v2.0
6 KVM_DEV_TYPE_FSL_MPIC_42 Freescale MPIC v4.2
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