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/Documentation/devicetree/bindings/net/
Dhisilicon-femac.txt1 Hisilicon Fast Ethernet MAC controller
9 The first region is the MAC core register base and size.
10 The second region is the global MAC control register.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
13 - resets: should contain the phandle to the MAC reset signal(required) and
15 - reset-names: should contain the reset signal name "mac"(required)
24 The MAC address will be determined using the optional properties
36 reset-names = "mac","phy";
37 mac-address = [00 00 00 00 00 00];
Dfaraday,ftmac.txt8 "moxa,moxart-mac"
10 - interrupts : Should contain the mac interrupt number
14 mac0: mac@90900000 {
15 compatible = "moxa,moxart-mac";
20 mac1: mac@92000000 {
21 compatible = "moxa,moxart-mac";
Dethernet-controller.yaml16 local-mac-address:
23 Specifies the MAC address that was assigned to the network device.
25 mac-address:
32 Specifies the MAC address that was last used by the boot
33 program; should be used in cases where the MAC address assigned
35 local-mac-address property.
52 Reference to an nvmem node for the MAC address
55 const: mac-address
61 # There is not a standard bus between the MAC and the PHY,
63 # MAC.
[all …]
Dkeystone-netcp.txt57 - Efuse MAC address register
98 - mac<->mac auto negotiate mode: 0
99 - mac<->phy mode: 1
100 - mac<->mac forced mode: 2
101 - mac<->fiber mode: 3
102 - mac<->phy mode with no mdio: 4
103 - 10Gb mac<->phy mode : 10
104 - 10Gb mac<->mac forced mode : 11
149 - efuse-mac: If this is 1, then the MAC address for the interface is
150 obtained from the device efuse mac address register.
[all …]
Dmicrel-ks8851.txt1 Micrel KS8851 Ethernet mac (MLL)
8 Micrel KS8851 Ethernet mac (SPI)
16 - vdd-supply: analog 3.3V supply for Ethernet mac
17 - vdd-io-supply: digital 1.8V IO supply for Ethernet mac
Dstm32-dwmac.txt15 Should be "mac-clk-tx" for the MAC TX clock.
16 Should be "mac-clk-rx" for the MAC RX clock.
20 Should be "macirq" for the main MAC IRQ
38 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
Dsocionext,uniphier-ave4.txt14 - interrupts: Should contain the MAC interrupt.
20 - clocks: A phandle to the clock for the MAC.
22 another MAC clock, GIO bus clock and PHY clock are also required.
26 - resets: A phandle to the reset control for the MAC. For Pro4 SoC,
32 that configures phy mode. The argument is the ID of MAC instance.
34 The MAC address will be determined using the optional properties
54 local-mac-address = [00 00 00 00 00 00];
Dmediatek-net.txt44 * Ethernet MAC node
47 - compatible: Should be "mediatek,eth-mac"
48 - reg: The number of the MAC
51 is equal to 0 and the MAC uses fixed-link to connect
75 gmac1: mac@0 {
76 compatible = "mediatek,eth-mac";
81 gmac2: mac@1 {
82 compatible = "mediatek,eth-mac";
Dhisilicon-hix5hd2-gmac.txt14 The first region is the MAC register base and size.
16 - interrupts: should contain the MAC interrupt.
23 - resets: should contain the phandle to the MAC core reset signal(optional),
24 the MAC interface reset signal(optional)
33 The MAC address will be determined using the properties defined in
50 mac-address = [00 00 00 00 00 00];
Dmediatek-dwmac.txt11 - interrupts: Should contain the MAC interrupts
14 Should be "macirq" for the main MAC IRQ
18 - mac-address: See ethernet.txt in the same directory
39 2. tx clock inside MAC will be inversed relative to reference clock
43 2. reference clock will be inversed when arrived at MAC in RMII case.
54 mac-address = [00 55 7b b5 7d f7];
Dqcom-emac.txt3 This network controller consists of two devices: a MAC and an SGMII
5 connects the MAC node to its corresponding internal phy node. Another
10 MAC node:
14 - mac-address : The 6-byte MAC address. If present, it is the default
15 MAC address.
Dcpsw.txt17 - mac_control : Specifies Default MAC control register content
55 The MAC address will be determined using the optional properties
71 mac: ethernet@4a100000 {
91 mac-address = [ 00 00 00 00 00 00 ];
98 mac-address = [ 00 00 00 00 00 00 ];
104 mac: ethernet@4a100000 {
122 mac-address = [ 00 00 00 00 00 00 ];
129 mac-address = [ 00 00 00 00 00 00 ];
Daltera_tse.txt1 * Altera Triple-Speed Ethernet MAC driver (TSE)
11 "control_port": MAC configuration space region
22 - rx-fifo-depth: MAC receive FIFO buffer depth in bytes
23 - tx-fifo-depth: MAC transmit FIFO buffer depth in bytes
49 The MAC address will be determined using the optional properties defined in
70 local-mac-address = [ 00 00 00 00 00 00 ];
108 local-mac-address = [ 00 00 00 00 00 00 ];
Dftgmac100.txt10 - "aspeed,ast2400-mac"
11 - "aspeed,ast2500-mac"
30 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
Dcavium-pip.txt63 local-mac-address = [ 00 0f b7 10 63 60 ];
69 local-mac-address = [ 00 0f b7 10 63 61 ];
75 local-mac-address = [ 00 0f b7 10 63 62 ];
81 local-mac-address = [ 00 0f b7 10 63 63 ];
95 local-mac-address = [ 00 0f b7 10 63 64 ];
/Documentation/devicetree/bindings/net/dsa/
Dsja1105.txt24 - sja1105,role-mac:
27 default (unless otherwise specified) a port is configured as MAC if it
29 (fixed-link specified, presumably because it is connected to a MAC).
37 1. If sja1105,role-mac is specified, and the phy-mode property is one
40 is the PHY. The SJA1105 MAC does not apply any internal delays.
43 is the SJA1105 MAC (if hardware-supported). This is only supported
47 the clock skew must either be added by the MAC at the other end of
51 to have sja1105,role-mac, while the other sja1105,role-phy.
90 /* Implicit "sja1105,role-mac;" */
98 /* Implicit "sja1105,role-mac;" */
[all …]
/Documentation/networking/
Dsfp-phylink.rst11 directly connected to a MAC without needing to re-initialise the
26 the PHY, and pass them to the MAC driver. We expect the MAC driver
32 Fixed mode is the same as PHY mode as far as the MAC driver is
64 to the MAC through the SGMII control word, and the MAC is expected to
66 :c:func:`mac_link_down` functions must not force the MAC side link
78 MAC settings. This can be done as a separate preparation commit.
173 This function is replaced by a different form of MAC updates
183 Finally, note that the MAC driver has no direct access to the PHY
206 from the MAC, and report back the settings that the MAC is currently
210 The :c:func:`mac_config` method is used to update the MAC with the
[all …]
Dnet_failover.rst17 a passthru/vf device with the same MAC gets registered as 'primary' slave
35 feature on the virtio-net interface and assign the same MAC address to both
42 <mac address='52:54:00:00:12:53'/>
51 <mac address='52:54:00:00:12:53'/>
89 <mac address='52:54:00:00:12:53'/>
105 MAC=52:54:00:00:12:53
109 bridge fdb del $MAC dev $PF master
111 ip link set $PF vf $VF_NUM mac $ZERO_MAC
/Documentation/devicetree/bindings/c6x/
Ddscr.txt16 provide device ID information, provide ethernet MAC addresses, as well as other
55 - ti,dscr-mac-fuse-regs
56 MAC addresses are contained in two registers. Each element of a MAC address
59 most significant to least. The value of these four cells is the MAC byte
61 is unused in the MAC address.
120 ti,dscr-mac-fuse-regs = <0x700 1 2 3 4
/Documentation/ABI/testing/
Dconfigfs-usb-gadget-eem11 host_addr - MAC address of host's end of this
13 dev_addr - MAC address of device's end of this
Dconfigfs-usb-gadget-ncm11 host_addr - MAC address of host's end of this
13 dev_addr - MAC address of device's end of this
Dconfigfs-usb-gadget-ecm11 host_addr - MAC address of host's end of this
13 dev_addr - MAC address of device's end of this
Dconfigfs-usb-gadget-subset11 host_addr - MAC address of host's end of this
13 dev_addr - MAC address of device's end of this
/Documentation/sound/hd-audio/
Dmodels.rst375 GPIO setup for Mac Pro
387 Vref setup for Mac Pro 1,1
389 Vref setup for Mac Pro 4,1
594 intel-mac-v1
595 Intel Mac Type 1
596 intel-mac-v2
597 Intel Mac Type 2
598 intel-mac-v3
599 Intel Mac Type 3
600 intel-mac-v4
[all …]
/Documentation/networking/device_drivers/stmicro/
Dstmmac.txt6 This is the driver for the MAC 10/100/1000 on-chip Ethernet controllers
9 Currently this network device driver is for all STi embedded MAC/GMAC
13 DWC Ether MAC 10/100/1000 Universal version 3.70a (and older) and DWC Ether
14 MAC 10/100 Universal version 4.0 have been used for developing this driver.
77 tested on DWC Ether MAC 10/100/1000 Universal version 3.41a and later.
161 o enh_desc: if sets the MAC will use the enhanced descriptor structure.
252 there are two MAC cores: one MAC is for MDIO Bus/PHY emulation
269 MAC for fixed_link by calling:
294 o mmc_core.c/mmc.h: Management MAC Counters;
308 o dwmac1000.h: specific header file for the MAC;
[all …]

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