Searched full:manager (Results 1 – 25 of 148) sorted by relevance
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| /Documentation/power/ |
| D | charger-manager.rst | 2 Charger Manager
7 Charger Manager provides in-kernel battery charger management that
12 Charger Manager is a platform_driver with power-supply-class entries.
13 An instance of Charger Manager (a platform-device created with Charger-Manager)
16 the system may need multiple instances of Charger Manager.
21 Charger Manager supports the following:
43 Charger Manager provides a function "cm_suspend_again" that can be
48 that are used by Charger Manager.
60 2. Global Charger-Manager Data related with suspend_again
62 In order to setup Charger Manager with suspend-again feature
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| /Documentation/devicetree/bindings/misc/ |
| D | intel,ixp4xx-ahb-queue-manager.yaml | 5 $id: "http://devicetree.org/schemas/misc/intel,ixp4xx-ahb-queue-manager.yaml#"
8 title: Intel IXP4xx AHB Queue Manager
14 The IXP4xx AHB Queue Manager maintains queues as circular buffers in
18 queues from the queue manager with foo-queue = <&qmgr N> where the
19 &qmgr is a phandle to the queue manager and N is the queue resource
26 - const: intel,ixp4xx-ahb-queue-manager
45 qmgr: queue-manager@60000000 {
46 compatible = "intel,ixp4xx-ahb-queue-manager";
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,apr.txt | 38 5 - Voice Stream Manager Service.
39 6 - Voice processing manager.
40 7 - Audio Stream Manager Service.
41 8 - Audio Device Manager Service.
42 9 - Multimode voice manager.
45 12 - Ultrasound stream manager.
46 13 - Listen stream manager.
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| /Documentation/devicetree/bindings/mailbox/ |
| D | ti,message-manager.txt | 1 Texas Instruments' Message Manager Driver
4 The Texas Instruments' Message Manager is a mailbox controller that has
6 manager is broken up into queues in different address regions that are called
10 Message Manager Device Node:
14 - compatible: Shall be: "ti,k2g-message-manager"
24 For ti,k2g-message-manager, this shall contain:
33 compatible = "ti,k2g-message-manager";
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| /Documentation/driver-api/fpga/ |
| D | fpga-mgr.rst | 1 FPGA Manager
7 The FPGA manager core exports a set of functions for programming an FPGA with
11 it's just binary data. The FPGA manager core won't parse it.
26 To add another FPGA manager, write a driver that implements a set of ops. The
52 mgr = devm_fpga_mgr_create(dev, "Altera SOCFPGA FPGA Manager",
101 API for implementing a new FPGA Manager driver
105 * struct :c:type:`fpga_manager` — the FPGA manager struct
106 * struct :c:type:`fpga_manager_ops` — Low level FPGA manager driver ops
107 * :c:func:`devm_fpga_mgr_create` — Allocate and init a manager struct
108 * :c:func:`fpga_mgr_register` — Register an FPGA manager
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| D | fpga-programming.rst | 8 FPGA manager, bridge, and regions. The actual function used to
12 the FPGA manager and bridges. It will:
15 * lock the mutex of the region's FPGA manager
29 When the FPGA region driver probed, it was given a pointer to an FPGA manager
30 driver so it knows which manager to use. The region also either has a list of
95 FPGA Manager flags
98 :doc: FPGA Manager flags
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| D | fpga-region.rst | 12 an FPGA Manager and a bridge (or bridges) with a reprogrammable region of an
24 * which FPGA manager to use to do the programming
54 Manager it will be using to do the programming. This usually would happen
57 * :c:func:`fpga_mgr_get` — Get a reference to an FPGA manager, raise ref count
58 * :c:func:`of_fpga_mgr_get` — Get a reference to an FPGA manager, raise ref count,
60 * :c:func:`fpga_mgr_put` — Put an FPGA manager
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| /Documentation/admin-guide/mm/ |
| D | userfaultfd.rst | 43 passed using unix domain sockets to a manager process, so the same
44 manager process could handle the userfaults of a multitude of
47 themselves on the same region the manager is already tracking, which
177 When the userfaultfd is monitored by an external manager, the manager
179 layout. Userfaultfd can notify the manager about such changes using
181 manager has to explicitly enable these events by setting appropriate
187 duplicated into the newly created process. The manager
194 different location, the manager will receive
205 enable notifications about memory unmapping. The manager will
211 userfaultfd manager. In the former case, the virtual memory is
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| /Documentation/devicetree/bindings/edac/ |
| D | socfpga-eccmgr.txt | 1 Altera SoCFPGA ECC Manager
2 This driver uses the EDAC framework to implement the SOCFPGA ECC Manager.
3 The ECC Manager counts and corrects single bit errors and counts/handles
6 Cyclone5 and Arria5 ECC Manager
8 - compatible : Should be "altr,socfpga-ecc-manager"
33 compatible = "altr,socfpga-ecc-manager";
52 Arria10 SoCFPGA ECC Manager
53 The Arria10 SoC ECC Manager handles the IRQs for each peripheral
58 - compatible : Should be "altr,socfpga-a10-ecc-manager"
59 - altr,sysgr-syscon : phandle to Arria10 System Manager Block
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| /Documentation/devicetree/bindings/fpga/ |
| D | altera-socfpga-fpga-mgr.txt | 1 Altera SOCFPGA FPGA Manager
6 - The first index is for FPGA manager register access.
8 - interrupts : interrupt for the FPGA Manager device.
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| D | fpga-region.txt | 66 * In some implementations, the FPGA Manager transparantly handles gating the
72 FPGA Manager
73 * An FPGA Manager is a hardware block that programs an FPGA under the control
112 2. Program the FPGA using the FPGA manager.
128 * FPGA Manager
144 reconfiguration. It must include a phandle to an FPGA Manager. The base
155 If an FPGA Region does not specify a FPGA Manager, it will inherit the FPGA
156 Manager specified by its ancestor FPGA Region. This supports both the case
157 where the same FPGA Manager is used for all of a FPGA as well the case where
158 a different FPGA Manager is used for each region.
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| D | xilinx-zynq-fpga-mgr.txt | 1 Xilinx Zynq FPGA Manager
6 - interrupts: interrupt for the FPGA manager device
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| D | altera-socfpga-a10-fpga-mgr.txt | 1 Altera SOCFPGA Arria10 FPGA Manager
6 - The first index is for FPGA manager register access.
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| /Documentation/ABI/testing/ |
| D | sysfs-class-fpga-manager | 5 Description: Name of low level fpga manager driver.
11 Description: Read fpga manager state as a string.
18 This is a superset of FPGA states and fpga manager driver
19 states. The fpga manager driver is walking through these steps
43 Description: Read fpga manager status as a string.
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| /Documentation/devicetree/bindings/power/supply/ |
| D | charger-manager.txt | 1 charger-manager bindings
5 - compatible : "charger-manager"
19 - cm-name : charger manager's name (default : "battery")
33 charger-manager@0 {
34 compatible = "charger-manager";
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| /Documentation/admin-guide/device-mapper/ |
| D | persistent-data.rst | 31 The block manager
34 dm-block-manager.[hc]
42 The transaction manager
45 dm-transaction-manager.[hc]
49 transaction manager is by shadowing an existing block (ie. doing
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| /Documentation/scsi/ |
| D | ufs.txt | 53 Task Manager and Device manager. The UFS interface is designed to be
58 * Task manager: It handles task management functions defined by the
60 * Device manager: It handles device level operations and device
72 * UDM_SAP: Device manager service access point is exposed to device
73 manager for device level operations. These device level operations
78 manager to transport task management functions.
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| /Documentation/devicetree/bindings/power/reset/ |
| D | brcm,bcm21664-resetmgr.txt | 1 Broadcom Kona Family Reset Manager
4 The reset manager is used on the Broadcom BCM21664 SoC.
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| /Documentation/devicetree/bindings/arm/altera/ |
| D | socfpga-clk-manager.yaml | 4 $id: http://devicetree.org/schemas/arm/altera/socfpga-clk-manager.yaml#
7 title: Altera SOCFPGA Clock Manager
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| D | socfpga-system.txt | 1 Altera SOCFPGA System Manager
19 for system manager register.
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| /Documentation/driver-api/ |
| D | slimbus.rst | 31 A manager device is responsible for enumeration, configuration, and dynamic
32 channel allocation. Every bus has 1 active manager.
41 Typically each SoC contains SLIMbus component having 1 manager, 1 framer device,
48 In case there are multiple framer devices on the same bus, manager device is
55 Each device has a 6-byte enumeration-address and the manager assigns every
64 implement duties needed by the SoC (manager device, associated
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| /Documentation/devicetree/bindings/arm/omap/ |
| D | dmm.txt | 1 OMAP Dynamic Memory Manager (DMM) bindings
3 The dynamic memory manager (DMM) is a module located immediately in front of the
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| /Documentation/devicetree/bindings/net/ |
| D | marvell-armada-370-neta.txt | 26 - buffer-manager: a phandle to a buffer manager node. Please refer to
46 buffer-manager = <&bm>;
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| /Documentation/security/tpm/ |
| D | xen-tpmfront.rst | 18 of the vTPM's secrets (Keys, NVRAM, etc) are managed by a vTPM Manager domain,
20 these domains (manager, vTPM, and guest) is trusted, the vTPM subsystem extends
96 A mini-os domain that implements the vTPM manager. There is
97 only one vTPM manager and it should be running during the
117 the vTPM and vTPM Manager stub domains. Once the stub domains are running, a
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| /Documentation/process/ |
| D | management-style.rst | 17 Btw, when talking about "kernel manager", it's all about the technical
20 budget of your group, you're almost certainly not a kernel manager.
39 manager must be to make it. That's very deep and obvious, but it's not
44 to decide on this", you're in trouble as a manager. The people you
56 makes you look like you know what you're doing, so what a kernel manager
72 you cannot escape. A cornered rat may be dangerous - a cornered manager
76 a kernel manager have huge fiscal responsibility **anyway**, it's usually
120 thing you can do as a manager is not to instill confidence, but rather a
139 Most people are idiots, and being a manager means you'll have to deal
147 However, in order to prepare yourself as a kernel manager, it's best to
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