Searched full:pm (Results 1 – 25 of 132) sorted by relevance
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| /Documentation/devicetree/bindings/arm/ux500/ |
| D | power_domain.txt | 1 * ST-Ericsson UX500 PM Domains
3 UX500 supports multiple PM domains which are used to gate power to one or
6 The implementation of PM domains for UX500 are based upon the generic PM domain
9 ==PM domain providers==
12 - compatible: Must be "stericsson,ux500-pm-domains".
17 compatible = "stericsson,ux500-pm-domains";
21 ==PM domain consumers==
24 - power-domains: A phandle and PM domain specifier. Below are the list of
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| /Documentation/power/ |
| D | runtime_pm.rst | 14 Support for runtime power management (runtime PM) of I/O devices is provided
15 at the power management core (PM core) level by means of:
18 put their PM-related work items. It is strongly recommended that pm_wq be
19 used for queuing all work items related to runtime PM, because this allows
24 * A number of runtime PM fields in the 'power' member of 'struct device' (which
25 is of the type 'struct dev_pm_info', defined in include/linux/pm.h) that can
26 be used for synchronizing runtime PM operations with one another.
28 * Three device runtime PM callbacks in 'struct dev_pm_ops' (defined in
29 include/linux/pm.h).
32 used for carrying out runtime PM operations in such a way that the
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| D | pm_qos_interface.rst | 2 PM Quality Of Service Interface
9 Two different PM QoS frameworks are available:
10 1. PM QoS classes for cpu_dma_latency
11 2. the per-device PM QoS framework provides the API to manage the per-device latency
12 constraints and PM QoS flags.
22 1. PM QoS framework
43 Will insert an element into the list for that identified PM QoS class with the
60 Returns the aggregated value for a given PM QoS class.
64 PM QoS class constraints list.
67 Adds a notification callback function to the PM QoS class. The callback is
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| D | pci.rst | 13 power management refer to Documentation/driver-api/pm/devices.rst and
44 approach, that is referred to as the native PCI power management (native PCI PM)
50 Devices supporting the native PCI PM usually can generate wakeup signals called
65 native PCI PM mechanism, because the method provided by the platform depends on
74 The PCI Bus Power Management Interface Specification (PCI PM Spec) was
79 The implementation of the PCI PM Spec is optional for conventional PCI devices,
80 but it is mandatory for PCI Express devices. If a device supports the PCI PM
85 The PCI PM Spec defines 4 operating states for devices (D0-D3) and for buses
102 regardless of whether or not it implements the PCI PM Spec. In addition to
103 that, if the PCI PM Spec is implemented by the device, it must support D3hot
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| D | drivers-testing.rst | 21 testing the new driver. Please see Documentation/power/basic-pm-debugging.rst
31 (see: Documentation/power/basic-pm-debugging.rst, 1).
34 "platform" modes (see: Documentation/power/basic-pm-debugging.rst, 1).
42 e) Try the test modes of suspend (see: Documentation/power/basic-pm-debugging.rst,
47 (see: Documentation/power/basic-pm-debugging.rst, 2).
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| /Documentation/devicetree/bindings/power/ |
| D | renesas,sysc-rmobile.txt | 23 - pm-domains: This node contains a hierarchy of PM domain nodes, which should
28 == PM Domain Nodes ==
30 Each of the PM domain nodes represents a PM domain, as documented by the
31 generic PM domain bindings in
41 - reg: If the PM domain is not always-on, this property must contain the bit
47 If the PM domain is always-on, this property must be omitted.
52 This shows a subset of the r8a7740 PM domain hierarchy, containing the
60 pm-domains {
87 == PM Domain Consumers ==
89 Hardware blocks belonging to a PM domain should contain a "power-domains"
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| D | power_domain.txt | 1 * Generic PM domains
3 System on chip designs are often divided into multiple PM domains that can be
7 This device tree binding can be used to bind PM domain consumer devices with
8 their PM domains provided by PM domain providers. A PM domain provider can be
9 represented by any node in the device tree and can provide one or more PM
11 phandle arguments (so called PM domain specifiers) of length specified by the
12 #power-domain-cells property in the PM domain provider node.
14 ==PM domain providers==
17 - #power-domain-cells : Number of cells in a PM domain specifier;
18 Typically 0 for nodes representing a single PM domain and 1 for nodes
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| D | xlnx,zynqmp-genpd.txt | 2 Device Tree Bindings for the Xilinx Zynq MPSoC PM domains
5 generic PM domain binding[1].
9 == Zynq MPSoC Generic PM Domain Node ==
13 - #power-domain-cells: Number of cells in a PM domain specifier. Must be 1.
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| /Documentation/devicetree/bindings/soc/bcm/ |
| D | brcm,bcm2835-pm.txt | 1 BCM2835 PM (Power domains, watchdog)
3 The PM block controls power domains and some reset lines, and includes
4 a watchdog timer. This binding supersedes the brcm,bcm2835-pm-wdt
5 binding which covered some of PM's register range and functionality.
9 - compatible: Should be "brcm,bcm2835-pm"
11 register ranges ("PM" and "ASYNC_BRIDGE" in that
34 pm {
35 compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
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| /Documentation/ABI/testing/ |
| D | sysfs-class-powercap | 4 Contact: linux-pm@vger.kernel.org
13 Contact: linux-pm@vger.kernel.org
22 Contact: linux-pm@vger.kernel.org
30 Contact: linux-pm@vger.kernel.org
40 Contact: linux-pm@vger.kernel.org
51 Contact: linux-pm@vger.kernel.org
58 Contact: linux-pm@vger.kernel.org
67 Contact: linux-pm@vger.kernel.org
75 Contact: linux-pm@vger.kernel.org
82 Contact: linux-pm@vger.kernel.org
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| D | sysfs-class-power | 5 Contact: linux-pm@vger.kernel.org
14 Contact: linux-pm@vger.kernel.org
23 Contact: linux-pm@vger.kernel.org
32 Contact: linux-pm@vger.kernel.org
43 Contact: linux-pm@vger.kernel.org
51 Contact: linux-pm@vger.kernel.org
65 Contact: linux-pm@vger.kernel.org
79 Contact: linux-pm@vger.kernel.org
89 Contact: linux-pm@vger.kernel.org
100 Contact: linux-pm@vger.kernel.org
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| D | sysfs-ata | 20 nr_pmp_links: (RO) If a SATA Port Multiplier (PM) is
40 Behind each port, there is a ata_link. If there is a SATA PM in the topology, 15
44 of the port. If a link is behind a PM, its name is linkX.Y where X is
45 ata_port_id of the parent port and Y the PM port.
70 - Y the port of the PM if any, and
89 gscr: (RO) Cached result of the dump of PM GSCR
101 Only valid if the device is a PM.
108 the device is not a PM.
119 "atapi" for packet device, "pmp" for PM, or
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| D | sysfs-devices-lpss_ltr | 18 This attribute is read-only. If the device's runtime PM status
30 This attribute is read-only. If the device's runtime PM status
42 This attribute is read-only. If the device's runtime PM status
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| /Documentation/arm/omap/ |
| D | omap_pm.rst | 2 The OMAP PM interface
5 This document describes the temporary OMAP PM interface. Driver
8 Over time, the intention is to merge features from the OMAP PM
9 interface into the Linux PM QoS code.
11 Drivers need to express PM parameters which:
15 - separate the drivers from the underlying PM parameter
16 implementation, whether it is the TI SRF or Linux PM QoS or Linux
19 - specify PM parameters in terms of fundamental units, such as
31 This document proposes the OMAP PM interface, including the following
55 Further documentation for all OMAP PM interface functions can be
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| /Documentation/devicetree/bindings/bus/ |
| D | simple-pm-bus.txt | 7 However, its bus controller is part of a PM domain, or under the control of a
8 functional clock. Hence, the bus controller's PM domain and/or clock must be
12 While "simple-pm-bus" follows the "simple-bus" set of properties, as specified
17 - compatible: Must contain at least "simple-pm-bus".
24 Optional platform-specific properties for clock or PM domain control (at least
27 - power-domains: Must contain a reference to the PM domain.
28 Please refer to the binding documentation for the clock and/or PM domain
36 "simple-pm-bus";
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| D | renesas,bsc.txt | 9 While the BSC is a fairly simple memory-mapped bus, it may be part of a PM
11 Before a device connected to the BSC can be accessed, the PM domain
15 The bindings for the BSC extend the bindings for "simple-pm-bus".
20 "simple-pm-bus" as fallbacks.
31 - power-domains: Must contain a reference to the PM domain, if available.
38 "simple-pm-bus";
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| /Documentation/devicetree/bindings/soc/ti/ |
| D | sci-pm-domain.txt | 11 PM Domain Node
13 The PM domain node represents the global PM domain managed by the PMMC, which
14 in this case is the implementation as documented by the generic PM domain
21 - compatible: should be "ti,sci-pm-domain"
39 compatible = "ti,sci-pm-domain";
44 PM Domain Consumers
46 Hardware blocks belonging to a PM domain should contain a "power-domains"
47 property that is a phandle pointing to the corresponding PM domain node
53 - power-domains: phandle pointing to the corresponding PM domain node
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| /Documentation/driver-api/pm/ |
| D | devices.rst | 26 management (PM) code is also driver-specific. Most drivers will do very
75 the PM core are involved in runtime power management. As in the system
84 synergies exist, so that several drivers using runtime PM might put the system
110 |struct dev_pm_ops| defined in :file:`include/linux/pm.h`. The roles of the
129 |struct dev_pm_domain|, or by the :c:member:`pm` member of |struct bus_type|,
133 device drivers whose subsystems (PM domains, device types, device classes and
160 its system wakeup mechanism and for notifying the PM core of system wakeup
268 the device is suspending (i.e. has been chosen by the PM core as the next
287 All phases use PM domain, bus, type, class or driver callbacks (that is, methods
288 defined in ``dev->pm_domain->ops``, ``dev->bus->pm``, ``dev->type->pm``,
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| /Documentation/fault-injection/ |
| D | notifier-error-inject.rst | 9 * PM notifier
14 PM notifier error injection module
18 /sys/kernel/debug/notifier-error-inject/pm/actions/<notifier event>/error
20 Possible PM notifier events to be failed are:
26 Example: Inject PM suspend error (-12 = -ENOMEM)::
28 # cd /sys/kernel/debug/notifier-error-inject/pm/
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| /Documentation/arm/samsung-s3c24xx/ |
| D | suspend.rst | 58 and will end up initialising all compiled machines' pm init!
85 There are several important things to remember when using PM suspend:
91 2) While the pm code itself will attempt to re-enable the UART clocks,
108 `S3C2410 PM Suspend debug`
115 `S3C2410 PM Suspend Memory CRC`
127 `S3C2410 PM Suspend CRC Chunksize (KiB)`
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| /Documentation/devicetree/bindings/arm/omap/ |
| D | mpu.txt | 17 - pm-sram: Phandles to ocmcram nodes to be used for power management.
19 and run PM functions, second should be regular pool to be used for
52 pm-sram = <&pm_sram_code
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| /Documentation/devicetree/bindings/watchdog/ |
| D | brcm,bcm2835-pm-wdog.txt | 5 - compatible : should be "brcm,bcm2835-pm-wdt"
15 compatible = "brcm,bcm2835-pm-wdt";
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| /Documentation/devicetree/bindings/pci/ |
| D | rockchip-pcie-ep.txt | 15 - "pm"
23 - "pm"
48 "hclk", "pm";
57 "pm", "pclk", "aclk";
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | renesas,dbsc.txt | 9 Currently memory controller device nodes are used only to reference PM
10 domains, and prevent these PM domains from being powered down, which would
32 - power-domains: Must contain a reference to the PM domain that the memory
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| /Documentation/arm/sa1100/ |
| D | assabet.rst | 254 - PM: Not tested.
255 - COM: TX, RX, CTS, DSR, DCD, RTS, DTR, PM
256 - PM: Not tested.
259 - PM: Not tested.
262 - LCD: Fully tested. PM
272 - PM: Not tested.
281 - PM: Not tested.
290 - PM: Not tested.
295 - PM: Not tested.
299 - PM: Not tested.
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