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/Documentation/devicetree/bindings/pwm/
Dpwm-mediatek.txt19 - "pwm1-8": the eight per PWM clocks for mt2712
20 - "pwm1-6": the six per PWM clocks for mt7622
21 - "pwm1-5": the five per PWM clocks for mt7623
38 clock-names = "top", "main", "pwm1", "pwm2",
Dti,twl-pwm.txt4 On TWL4030 series: PWM1 and PWM2
5 On TWL6030 series: PWM0 and PWM1
Dpwm-lp3943.txt9 - ti,pwm0 or ti,pwm1: Output pin number(s) for PWM channel 0 or 1.
33 ti,pwm1 = <15>;
Dvt8500-pwm.txt13 pwm1: pwm@d8220000 {
Dimx-pwm.txt19 pwm1: pwm@53fb4000 {
Dpwm-sprd.txt24 "pwm1", "enable1",
Dpwm-st.txt30 pwm1: pwm@fe510000 {
/Documentation/hwmon/
Damc6821.rst52 pwm1 rw pwm1
69 pwm1 = pwm1_auto_point2_pwm. It can go from
86 pwm1 = pwm1_auto_point2_pwm. It can go from
Dtc654.rst28 pwm1_mode determines if the pwm output is controlled via the pwm1 value
33 the pwm1 value. Setting pwm1_mode to 0 will cause the pwm output to be
Dg762.rst50 speed control (open-loop) via pwm1 described below, 2 for
57 pwm1:
64 the fan speed is programmed by setting a value between 0 and 255 via 'pwm1'
Dthmc50.rst80 pwm1
85 The value of 0 for pwm1 also forces FAN_OFF signal from the chip,
Dmlxreg-fan.rst21 pwm1 0xe3
60 pwm1 RW file for fan[1-12] target duty cycle (0..255)
Dw83793.rst77 sure bit 0 is cleared in the 6 values. And then set the pwm1 value to
112 Only Fan1-5 and PWM1-3 are guaranteed to always exist, other fan inputs and
Dg760a.rst22 The fan speed is programmed by setting the period via 'pwm1' of two
Dw83795.rst75 41 FANCTL1 10h (bank 2) pwm1
131 33 FANCTL1 10h (bank 2) pwm1
Dw83792d.rst48 The driver also implements up to seven fan control outputs: pwm1-7. Pwm1-7
Dmax6639.rst43 pwm1 RW Fan 1 target duty cycle (0..255)
Df71805f.rst179 Both of the automatic modes require that pwm1 corresponds to fan1, pwm2 to
181 to pwm1 and fan1, etc.
/Documentation/driver-api/thermal/
Dnouveau_thermal.rst63 * pwm1:
78 * 1: The fan can be driven in manual (use pwm1 to change the speed);
/Documentation/devicetree/bindings/mfd/
Dlp3943.txt31 ti,pwm1 = <15>;
/Documentation/devicetree/bindings/regulator/
Dpwm-regulator.txt63 pwms = <&pwm1 0 8448 0>;
80 pwms = <&pwm1 0 8448 0>;
/Documentation/devicetree/bindings/leds/
Dleds-pwm.txt26 /* provides two PWMs (id 0, 1 for PWM1 and PWM2) */
/Documentation/devicetree/bindings/pinctrl/
Daspeed,ast2600-pinctrl.yaml46 NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE, PWM0, PWM1, PWM10, PWM11,
74 OSCCLK, PEWAKE, PWM0, PWM1, PWM10G0, PWM10G1, PWM11G0, PWM11G1,
Dbrcm,cygnus-pinmux.txt55 "pwm1": "pwm1_grp"
Daspeed,ast2400-pinctrl.yaml43 NRI3, NRI4, NRTS1, NRTS2, NRTS3, OSCCLK, PWM0, PWM1, PWM2, PWM3,

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