| /Documentation/devicetree/bindings/pwm/ |
| D | ti,twl-pwm.txt | 4 On TWL4030 series: PWM1 and PWM2
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| D | pwm-sprd.txt | 25 "pwm2", "enable2",
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| D | pwm-mediatek.txt | 38 clock-names = "top", "main", "pwm1", "pwm2",
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| /Documentation/devicetree/bindings/clock/ |
| D | pwm-clock.txt | 25 pwms = <&pwm2 0 40>; /* 1 / 40 ns = 25 MHz */
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-pwm.txt | 26 /* provides two PWMs (id 0, 1 for PWM1 and PWM2) */
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | aspeed,ast2600-pinctrl.yaml | 47 PWM12, PWM13, PWM14, PWM15, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7,
76 PWM15G1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, PWM8G0, PWM8G1,
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| D | brcm,cygnus-pinmux.txt | 57 "pwm2": "pwm2_grp"
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| D | aspeed,ast2400-pinctrl.yaml | 43 NRI3, NRI4, NRTS1, NRTS2, NRTS3, OSCCLK, PWM0, PWM1, PWM2, PWM3,
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| D | cirrus,madera-pinctrl.txt | 48 opclk, opclk-async, pwm1, pwm2, spdif,
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| D | marvell,armada-37xx-pinctrl.txt | 52 group pwm2
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| D | nuvoton,npcm7xx-pinctrl.txt | 65 "GPIO80/PWM0", "GPIO81/PWM1", "GPIO82/PWM2", "GPIO83/PWM3", "GPIO84/R2TXD0",
148 pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, pwm6, pwm7, rg1, rg1mdio, rg2,
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| D | aspeed,ast2500-pinctrl.yaml | 54 NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE, PNOR, PWM0, PWM1, PWM2,
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| D | bitmain,bm1880-pinctrl.txt | 69 nand, spi, emmc, sdio, eth0, pwm0, pwm1, pwm2, pwm3, pwm4,
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| D | qcom,ipq8074-pinctrl.txt | 108 pta1_2, pta2_0, pta2_1, pta2_2, pwm0, pwm1, pwm2, pwm3,
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| D | nvidia,tegra114-pinmux.txt | 89 pwm0, pwm1, pwm2, pwm3, pwron, reset_out_n, rsvd1, rsvd2, rsvd3,
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| D | pinctrl_spear.txt | 140 "can0", "can1", "pwm0_1", "pwm2", "pwm3", "ssp1", "ssp2", "mii2",
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| D | nvidia,tegra30-pinmux.txt | 100 nand_alt, owr, pcie, pwm0, pwm1, pwm2, pwm3, pwr_int_n, rsvd1, rsvd2,
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| D | nvidia,tegra124-pinmux.txt | 107 i2s1, i2s2, i2s3, i2s4, irda, kbc, owr, pmi, pwm0, pwm1, pwm2, pwm3,
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| D | actions,s700-pinctrl.txt | 121 pcm1, pcm0, ks, jtag, pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, p0,
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| D | nvidia,tegra210-pinmux.txt | 139 pe1, pmi, pwm0, pwm1, pwm2, pwm3, qspi, rsvd0, rsvd1, rsvd2, rsvd3, sata,
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| /Documentation/hwmon/ |
| D | w83795.rst | 76 43 FANCTL2 11h (bank 2) pwm2
132 35 FANCTL2 11h (bank 2) pwm2
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| D | max6639.rst | 44 pwm2 RW Fan 2 target duty cycle (0..255)
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| D | w83781d.rst | 218 782d and 783s datasheets differ on which is pwm1 and which is pwm2.
221 782d and 783s pin is programmable for fan3 input or pwm2 output;
223 If pwm2 is enabled (with echo 255 1 > pwm2), then
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| D | f71882fg.rst | 191 All of the automatic modes require that pwm1 corresponds to fan1, pwm2 to
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| D | lm93.rst | 148 and pwm2 are used to set the manual duty cycle; each is an integer (0-255)
152 PWM mode is disabled, the value of pwm1 and pwm2 indicates the current duty
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