Searched full:pixel (Results 1 – 25 of 171) sorted by relevance
1234567
| /Documentation/media/uapi/v4l/ |
| D | ext-ctrls-image-process.rst | 31 Data bus frequency. Together with the media bus pixel code, bus type
32 (clock cycles per sample), the data bus frequency defines the pixel
33 rate (``V4L2_CID_PIXEL_RATE``) in the pixel array (or possibly
35 be calculated from the pixel clock, image width and height and
36 horizontal and vertical blanking. While the pixel rate control may
37 be defined elsewhere than in the subdev containing the pixel array,
39 because only on the pixel array it can be assumed that the vertical
41 allowed in the pixel array. The selection of frame rate is performed
46 Pixel rate in the source pads of the subdev. This control is
|
| D | vidioc-enum-framesizes.rst | 37 that contains an index and pixel format and receives a frame width
45 and height in pixels) that the device supports for the given pixel
48 The supported pixel formats can be obtained by using the
111 - Width of the frame [pixel].
114 - Height of the frame [pixel].
129 - Minimum frame width [pixel].
132 - Maximum frame width [pixel].
135 - Frame width step size [pixel].
138 - Minimum frame height [pixel].
141 - Maximum frame height [pixel].
[all …]
|
| D | pixfmt-intro.rst | 36 leftmost pixel of the topmost row. Following that is the pixel
38 pixels. Following the rightmost pixel of the row there may be zero or
39 more bytes of padding to guarantee that each row of pixel data has a
41 leftmost pixel of the second row from the top, and so on. The last row
|
| D | pixfmt-cnf4.rst | 9 Depth sensor confidence information as a 4 bits per pixel packed array
20 Bits 0-3 of byte n refer to confidence value of depth pixel 2*n,
21 bits 4-7 to confidence value of depth pixel 2*n+1.
|
| D | pixfmt-y12i.rst | 22 This is a grey-scale image with a depth of 12 bits per pixel, but with
23 pixels from 2 sources interleaved and bit-packed. Each pixel is stored
35 interleaved pixel.
|
| D | vidioc-g-fbuf.rst | 111 the pixel in the top left corner of the framebuffer. [#f1]_
137 - The pixel format of the framebuffer.
159 undefined. See :ref:`pixfmt` for information on pixel formats.
179 ``width`` times bytes-per-pixel or a larger value required by the
314 output = framebuffer pixel * alpha + video pixel * (1 - alpha).
315 The actual alpha depth depends on the framebuffer pixel format.
319 images. The blend function is: output = (framebuffer pixel * alpha
320 + video pixel * (255 - alpha)) / 255. The alpha value is
330 framebuffer pixel * (1 - alpha) + video pixel * alpha. The actual
331 alpha depth depends on the framebuffer pixel format.
|
| D | pixfmt-z16.rst | 17 16-bit depth data with distance values at each pixel
23 This is a 16-bit format, representing depth data. Each pixel is a
25 can vary and has to be negotiated with the device separately. Each pixel
|
| D | pixfmt-y8i.rst | 23 This is a grey-scale image with a depth of 8 bits per pixel, but with
24 pixels from 2 sources interleaved. Each pixel is stored in a 16-bit
25 word. E.g. the R200 RealSense camera stores pixel from the left sensor
|
| /Documentation/media/v4l-drivers/ |
| D | fourcc.rst | 3 Guidelines for Video4Linux pixel format 4CCs
8 the pixel format, compression and colour space. The interpretation of the
23 2nd character: pixel order
30 3rd character: uncompressed bits-per-pixel 0--9, A--
32 4th character: compressed bits-per-pixel 0--9, A--
|
| D | soc-camera.rst | 90 supports non-standard pixel format conversion, it should implement a
112 pixel format descriptor, corresponding to a certain media-bus pixel format code.
122 pixel. Changing sensor window sizes preserves any scaling factors, therefore
159 V4L2 distinguishes between pixel formats, as they are stored in memory, and as
162 maintained by soc-camera core, which describes, what FOURCC pixel format will
163 be obtained, if a media-bus pixel format is stored in memory according to
|
| /Documentation/devicetree/bindings/display/armada/ |
| D | marvell,dove-lcd.txt | 13 "axiclk" - axi bus clock for pixel clock
14 "plldivider" - pll divider clock for pixel clock
15 "ext_ref_clk0" - external clock 0 for pixel clock
16 "ext_ref_clk1" - external clock 1 for pixel clock
|
| /Documentation/devicetree/bindings/media/i2c/ |
| D | mt9p031.txt | 3 The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor with
14 - pixel-clock-frequency: Pixel clock frequency.
35 pixel-clock-frequency = <96000000>;
|
| /Documentation/devicetree/bindings/display/ |
| D | brcm,bcm-vc4.txt | 10 Required properties for Pixel Valve:
31 b) pixel: The pixel clock.
45 b) pixel: The pixel clock that feeds the pixelvalve
72 c) pixel: The DSI pixel clock from CPRMAN
107 clock-names = "pixel", "hdmi";
115 clock-names = "core", "pixel";
137 clock-names = "phy", "escape", "pixel";
|
| D | cirrus,clps711x-fb.txt | 11 - bits-per-pixel: Bits per pixel.
31 bits-per-pixel = <4>;
|
| D | wm,wm8505-fb.txt | 7 - bits-per-pixel : bit depth of framebuffer (16 or 32)
17 bits-per-pixel = <16>;
|
| D | via,vt8500-fb.txt | 8 - bits-per-pixel : bit depth of framebuffer (16 or 32)
19 bits-per-pixel = <16>;
|
| /Documentation/devicetree/bindings/media/ |
| D | fsl-pxp.txt | 1 Freescale Pixel Pipeline
4 The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine
6 pixel conversion via lookup table. Different versions are present on various
|
| /Documentation/media/kapi/ |
| D | csi2.rst | 24 V4L2_CID_PIXEL_RATE is may be used by the receiver to obtain the pixel
35 .. list-table:: variables in pixel rate calculation
83 The media bus pixel codes document parallel formats. Should the pixel data be
84 transported over a serial bus, the media bus pixel code that describes a
|
| /Documentation/fb/ |
| D | pxafb.rst | 33 Pixel clock in picoseconds
63 4 or 8 pixel monochrome single panel data
72 Double pixel clock. 1=>true, 0=>false
80 pixel clock polarity
112 bpp = 16 -- for YUV422 planar (1 pixel = 1 Y + 1/2 Cb + 1/2 Cr)
114 bpp = 12 -- for YUV420 planar (1 pixel = 1 Y + 1/4 Cb + 1/4 Cr)
123 with minimum bits per pixel, e.g. for YUV420, Cr component
124 for one pixel is actually 2-bits, it means the line length
|
| D | internals.rst | 61 Each pixel is either black or white.
66 The whole pixel value is fed through a programmable lookup table that has one
67 color (including red, green, and blue intensities) for each possible pixel
73 The pixel value is broken up into red, green, and blue fields.
78 The pixel value is broken up into red, green, and blue fields, each of which
|
| D | api.rst | 47 to be aware of the pixel storage format in order to write image data to the
97 set to 0. When the number of bits per pixel is smaller than 8, several pixels
108 set to 1. When the number of bits per pixel is smaller than 8, several pixels
124 Pixel values are encoded as indices into a colormap that stores red, green and
128 Each pixel value is stored in the number of bits reported by the variable
198 __u32 nonstd; /* != 0 Non standard pixel format */
208 __u32 pixclock; /* pixel clock in ps (pico seconds) */
268 Pixel values are bits_per_pixel wide and are split in non-overlapping red,
270 component in the pixel value are described by the fb_bitfield offset and
274 bits per pixel is not a multiple of 8, pixel values are padded to the next
|
| /Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,dpi.txt | 5 provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel
14 - clock-names: must contain "pixel", "engine", and "pll"
28 clock-names = "pixel", "engine", "pll";
|
| /Documentation/devicetree/bindings/display/imx/ |
| D | fsl,imx-fb.txt | 14 - bits-per-pixel: Bits per pixel
42 bits-per-pixel = <16>;
|
| /Documentation/devicetree/bindings/display/exynos/ |
| D | exynos_hdmi.txt | 25 c) sclk_pixel: Pixel special clock, one of the two possible inputs of
41 e) i_pixel_clk: Gate of HDMI pixel clock.
48 j) pixel_clko: Pixel clock generated by HDMI-PHY.
|
| /Documentation/devicetree/bindings/soc/amlogic/ |
| D | amlogic,canvas.txt | 4 A canvas is a collection of metadata that describes a pixel buffer.
8 Many IPs within Amlogic SoCs rely on canvas indexes to read/write pixel data
|
1234567