Searched full:sram (Results 1 – 25 of 62) sorted by relevance
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| /Documentation/devicetree/bindings/sram/ |
| D | sunxi-sram.txt | 1 Allwinnner SoC SRAM controllers
4 The SRAM controller found on most Allwinner devices is represented by
5 a regular node for the SRAM controller itself, with sub-nodes
6 reprensenting the SRAM handled by the SRAM controller.
13 - "allwinner,sun4i-a10-sram-controller" (deprecated)
19 - "allwinner,sun50i-a64-sram-controller" (deprecated)
24 - reg : sram controller register offset + length
26 SRAM nodes
29 Each SRAM is described using the mmio-sram bindings documented in
30 Documentation/devicetree/bindings/sram/sram.txt
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| D | rockchip-smp-sram.txt | 1 Rockchip SRAM for smp bringup:
4 Rockchip's smp-capable SoCs use the first part of the sram for the bringup
6 residing at the very beginning of the sram.
8 Therefore a reserved section sub-node has to be added to the mmio-sram
12 - compatible : should be "rockchip,rk3066-smp-sram"
14 The rest of the properties should follow the generic mmio-sram discription
15 found in Documentation/devicetree/bindings/sram/sram.txt
19 sram: sram@10080000 {
20 compatible = "mmio-sram";
26 smp-sram@10080000 {
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| D | sram.txt | 1 Generic on-chip SRAM
7 - compatible : mmio-sram or atmel,sama5d2-securam
9 - reg : SRAM iomem address range
11 Reserving sram areas:
14 Each child of the sram node specifies a region of reserved memory. Each
22 Required properties in the sram node:
26 within the sram to bus addresses
28 Optional properties in the sram node:
30 - no-memory-wc : the flag indicating, that SRAM memory region has not to
35 - reg : iomem address range, relative to the SRAM range
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| D | renesas,smp-sram.txt | 1 * Renesas SMP SRAM
3 Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
5 This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
6 Documentation/devicetree/bindings/sram/sram.txt.
9 - compatible: Must be "renesas,smp-sram",
10 - reg: Address and length of the reserved SRAM.
16 icram1: sram@e63c0000 {
17 compatible = "mmio-sram";
23 smp-sram@0 {
24 compatible = "renesas,smp-sram";
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| D | milbeaut-smp-sram.txt | 1 Milbeaut SRAM for smp bringup
3 Milbeaut SoCs use a part of the sram for the bringup of the secondary cores.
5 of the sram.
6 Therefore the part needs to be added as the sub-node of mmio-sram.
9 - compatible : should be "socionext,milbeaut-smp-sram"
13 sram: sram@0 {
14 compatible = "mmio-sram";
20 smp-sram@f100 {
21 compatible = "socionext,milbeaut-smp-sram";
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| D | rockchip-pmu-sram.txt | 1 Rockchip SRAM for pmu:
4 The sram of pmu is used to store the function of resume from maskrom(the 1st
5 level loader). This is a common use of the "pmu-sram" because it keeps power
9 - compatible : should be "rockchip,rk3288-pmu-sram"
13 sram@ff720000 {
14 compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
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| D | samsung-sram.txt | 8 Therefore reserved section sub-nodes have to be added to the mmio-sram
17 The rest of the properties should follow the generic mmio-sram discription
18 found in Documentation/devicetree/bindings/sram/sram.txt
23 compatible = "mmio-sram";
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| /Documentation/devicetree/bindings/arm/sunxi/ |
| D | smp-sram.txt | 1 Allwinner SRAM for smp bringup:
4 Allwinner's A80 SoC uses part of the secure sram for hotplugging of the
9 Therefore a reserved section sub-node has to be added to the mmio-sram
12 Note that this is separate from the Allwinner SRAM controller found in
13 ../../sram/sunxi-sram.txt. This SRAM is secure only and not mappable to
17 check if this SRAM is usable first.
21 "allwinner,sun9i-a80-smp-sram"
23 The rest of the properties should follow the generic mmio-sram discription
24 found in ../../misc/sram.txt
28 sram_b: sram@20000 {
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| /Documentation/devicetree/bindings/arm/amlogic/ |
| D | smp-sram.txt | 1 Amlogic Meson8 and Meson8b SRAM for smp bringup:
4 Amlogic's SMP-capable SoCs use part of the sram for the bringup of the cores.
8 Therefore a reserved section sub-node has to be added to the mmio-sram
13 "amlogic,meson8-smp-sram"
14 "amlogic,meson8b-smp-sram"
16 The rest of the properties should follow the generic mmio-sram discription
17 found in ../../misc/sram.txt
21 sram: sram@d9000000 {
22 compatible = "mmio-sram";
28 smp-sram@1ff80 {
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | cache_sram.txt | 1 * Freescale PQ3 and QorIQ based Cache SRAM
5 as SRAM. This cache SRAM representation in the device
10 - compatible : should be "fsl,p2020-cache-sram"
11 - fsl,cache-sram-ctlr-handle : points to the L2 controller
12 - reg : offset and length of the cache-sram.
16 cache-sram@fff00000 {
17 fsl,cache-sram-ctlr-handle = <&L2>;
19 compatible = "fsl,p2020-cache-sram";
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| /Documentation/devicetree/bindings/crypto/ |
| D | mv_cesa.txt | 9 region. Can also contain an entry for the SRAM attached to the CESA,
12 - reg-names: "regs". Can contain an "sram" entry, but this representation
17 - marvell,crypto-srams: phandle to crypto SRAM definitions
20 - marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not
21 specified the whole SRAM is used (2KB)
31 marvell,crypto-sram-size = <0x600>;
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| D | marvell-cesa.txt | 13 region. Can also contain an entry for the SRAM attached to the CESA,
16 - reg-names: "regs". Can contain an "sram" entry, but this representation
26 - marvell,crypto-srams: phandle to crypto SRAM definitions
29 - marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not
30 specified the whole SRAM is used (2KB)
43 marvell,crypto-sram-size = <0x600>;
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| /Documentation/devicetree/bindings/arm/omap/ |
| D | mpu.txt | 14 - sram: Phandle to the ocmcram node
17 - pm-sram: Phandles to ocmcram nodes to be used for power management.
20 data region for code. See Documentation/devicetree/bindings/sram/sram.txt
52 pm-sram = <&pm_sram_code
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| /Documentation/devicetree/bindings/arm/ |
| D | juno,scpi.txt | 4 Juno SRAM and Shared Memory for SCPI
8 - compatible : should be "arm,juno-sram-ns" for Non-secure SRAM
13 - reg : The base offset and size of the reserved area with the SRAM
14 - compatible : should be "arm,juno-scp-shmem" for Non-secure SRAM based
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| D | arm,scpi.txt | 59 SRAM and Shared Memory for SCPI
62 A small area of SRAM is reserved for SCPI communication between application
65 The properties should follow the generic mmio-sram description found in [3]
70 - reg : The base offset and size of the reserved area with the SRAM
71 - compatible : should be "arm,scp-shmem" for Non-secure SRAM based
112 [3] Documentation/devicetree/bindings/sram/sram.txt
117 sram: sram@50000000 {
118 compatible = "arm,juno-sram-ns", "mmio-sram";
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| D | arm,scmi.txt | 86 SRAM and Shared Memory for SCMI
89 A small area of SRAM is reserved for SCMI communication between application
92 The properties should follow the generic mmio-sram description found in [4]
97 - reg : The base offset and size of the reserved area with the SRAM
98 - compatible : should be "arm,scmi-shmem" for Non-secure SRAM based
105 [4] Documentation/devicetree/bindings/sram/sram.txt
110 sram@50000000 {
111 compatible = "mmio-sram";
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| D | amlogic,scpi.txt | 8 AMLOGIC SRAM and Shared Memory for SCPI
12 - compatible : should be "amlogic,meson-gxbb-sram"
17 - compatible : should be "amlogic,meson-gxbb-scp-shmem" for SRAM based shared
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| /Documentation/devicetree/bindings/net/ |
| D | marvell-orion-net.txt | 43 - marvell,tx-sram-addr: address of transmit descriptor buffer located in SRAM.
44 - marvell,tx-sram-size: size of transmit descriptor buffer located in SRAM.
46 - marvell,rx-sram-addr: address of receive descriptor buffer located in SRAM.
47 - marvell,rx-sram-size: size of receive descriptor buffer located in SRAM.
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| D | allwinner,sun4i-a10-emac.yaml | 29 allwinner,sram:
30 description: Phandle to the device SRAM
39 - allwinner,sram
49 allwinner,sram = <&emac_sram 1>;
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| /Documentation/devicetree/bindings/clock/ |
| D | hi6220-clock.txt | 28 - hisilicon,hi6220-clk-sram: phandle to the syscon managing the SoC internal sram;
29 the driver need use the sram to pass parameters for frequency change.
44 hisilicon,hi6220-clk-sram = <&sram>;
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| /Documentation/devicetree/bindings/media/ |
| D | allegro.txt | 14 length of the memory mapped sram
15 - reg-names: must include "regs" and "sram"
26 reg-names = "regs", "sram";
37 reg-names = "regs", "sram";
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| /Documentation/devicetree/bindings/fsi/ |
| D | fsi-master-ast-cf.txt | 19 - aspeed,sram = <phandle>; : Reference to the SRAM node.
34 aspeed,sram = <&sram>;
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| /Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 32 - sram : Phandles for generic sram driver nodes,
35 data region for code. See Documentation/devicetree/bindings/sram/sram.txt
76 sram = <&pm_sram_code
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| /Documentation/devicetree/bindings/bus/ |
| D | allwinner,sun50i-a64-de2.yaml | 33 allwinner,sram:
38 The SRAM that needs to be claimed to access the display engine
60 - allwinner,sram
69 allwinner,sram = <&de2_sram 1>;
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| /Documentation/devicetree/bindings/mailbox/ |
| D | mailbox.txt | 41 sram: sram@50000000 {
42 compatible = "mmio-sram";
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