Searched full:sampling (Results 1 – 25 of 101) sorted by relevance
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| /Documentation/devicetree/bindings/staging/iio/adc/ |
| D | spear-adc.txt | 7 - sampling-frequency: Default sampling frequency
22 sampling-frequency = <5000000>;
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| /Documentation/sound/cards/ |
| D | maya44.rst | 29 - playback and capture at all sampling rates
63 * pci/ice1724/ice1724.h.patch - PROPOSED patch to ice1724.h (see SAMPLING RATES)
92 SAMPLING RATES
95 The Maya44 card (or more exactly, the Wolfson WM8776 codecs) allow a maximum sampling rate of 192 k…
97 As the ICE1724 chip only allows one global sampling rate, this is handled as follows:
99 * setting the sampling rate on any open PCM device on the maya44 card will always set the *global* …
106 …ditional code for limiting the sampling rate when setting on a capture pcm device. However because…
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| /Documentation/ABI/testing/ |
| D | configfs-usb-gadget-uac2 | 8 c_srate - capture sampling rate
11 p_srate - playback sampling rate
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| D | configfs-usb-gadget-uac1 | 8 c_srate - capture sampling rate
11 p_srate - playback sampling rate
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| D | sysfs-bus-iio-timer-stm32 | 79 Reading returns the current sampling frequency.
80 Writing an value different of 0 set and start sampling.
81 Writing 0 stop sampling.
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | amlogic,meson-saradc.txt | 15 - interrupts: the interrupt indicating end of sampling
21 - "adc_clk" for the ADC (sampling) clock
22 - "adc_sel" for the ADC (sampling) clock mux
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| D | renesas,gyroadc.txt | 34 12bit sampling, up to 4 channels can be sampled in
45 15bit sampling, up to 8 channels can be sampled in
54 16bit sampling, up to 8 channels can be sampled in
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| D | adi,ad7606.yaml | 7 title: Analog Devices AD7606 Simultaneous Sampling ADC
14 Analog Devices AD7606 Simultaneous Sampling ADC
85 Must be the device tree identifier of the over-sampling
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| D | at91-sama5d2_adc.txt | 11 - atmel,min-sample-rate-hz: Minimum sampling rate, it depends on SoC.
12 - atmel,max-sample-rate-hz: Maximum sampling rate, it depends on SoC.
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| D | mcp3911.txt | 13 - clocks: Phandle and clock identifier for sampling clock
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-samsung.txt | 61 - samsung,spi-feedback-delay: The sampling phase shift to be applied on the
66 - 1: 90 degree phase shift sampling.
67 - 2: 180 degree phase shift sampling.
68 - 3: 270 degree phase shift sampling.
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| /Documentation/devicetree/bindings/sound/ |
| D | nau8824.txt | 53 - nuvoton,sar-sampling-time: SAR sampling time
85 nuvoton,sar-sampling-time = <1>;
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| D | nau8825.txt | 57 - nuvoton,sar-sampling-time: SAR sampling time
97 nuvoton,sar-sampling-time = <0>;
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| D | st,stm32-i2s.txt | 15 "x8k": I2S parent clock for sampling rates multiple of 8kHz.
16 "x11k": I2S parent clock for sampling rates multiple of 11.025kHz.
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| D | mt8173-rt5650.txt | 18 1 : internal source from mt8173, MCLK = sampling rate*256
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| D | fsl,micfil.txt | 4 microphone bitstream in a configurable output sampling rate.
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| D | adi,axi-spdif-tx.txt | 8 the clock used as the sampling rate reference clock sample.
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| D | st,stm32-sai.txt | 17 "x8k": SAI parent clock for sampling rates multiple of 8kHz.
18 "x11k": SAI parent clock for sampling rates multiple of 11.025kHz.
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| D | designware-i2s.txt | 7 clocks. The controller expects one clock: the clock used as the sampling
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| /Documentation/devicetree/bindings/mmc/ |
| D | cavium-mmc.txt | 22 - cavium,cmd-clk-skew : number of coprocessor clocks before sampling command
23 - cavium,dat-clk-skew : number of coprocessor clocks before sampling data
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| /Documentation/x86/ |
| D | mds.rst | 1 Microarchitectural Data Sampling (MDS) mitigation
9 Microarchitectural Data Sampling (MDS) is a family of side channel attacks
12 - Microarchitectural Store Buffer Data Sampling (MSBDS) (CVE-2018-12126)
13 - Microarchitectural Fill Buffer Data Sampling (MFBDS) (CVE-2018-12130)
14 - Microarchitectural Load Port Data Sampling (MLPDS) (CVE-2018-12127)
15 - Microarchitectural Data Sampling Uncacheable Memory (MDSUM) (CVE-2019-11091)
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| /Documentation/admin-guide/hw-vuln/ |
| D | mds.rst | 1 MDS - Microarchitectural Data Sampling
4 Microarchitectural Data Sampling is a hardware vulnerability which allows
36 CVE-2018-12126 MSBDS Microarchitectural Store Buffer Data Sampling
37 CVE-2018-12130 MFBDS Microarchitectural Fill Buffer Data Sampling
38 CVE-2018-12127 MLPDS Microarchitectural Load Port Data Sampling
39 CVE-2019-11091 MDSUM Microarchitectural Data Sampling Uncacheable Memory
73 consequence the attacks are purely sampling based, but as demonstrated with
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| /Documentation/media/uapi/v4l/ |
| D | dev-sdr.rst | 53 ADC/DAC sampling rate (sampling frequency) and the possible radio
70 capture and output format. Both the sampling resolution and the data
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| /Documentation/devicetree/bindings/phy/ |
| D | apm-xgene-phy.txt | 23 data earlier than the nominal sampling point. 1 means
24 sample data later than the nominal sampling point.
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| /Documentation/hwmon/ |
| D | adt7410.rst | 59 continuous temperature sampling, as well as sampling one temperature value per
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