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Searched full:tmds (Results 1 – 11 of 11) sorted by relevance

/Documentation/devicetree/bindings/display/
Damlogic,meson-dw-hdmi.yaml17 - A custom HDMI PHY in order to convert video to TMDS signal
22 | Synopsys HDMI | HDMI PHY |=> TMDS
93 A port node pointing to the TMDS Output port node.
141 /* TMDS Output */
Dst,stih4xx.txt205 clock-names = "pix", "tmds", "phy", "audio";
/Documentation/devicetree/bindings/display/exynos/
Dexynos_hdmi.txt40 d) i_tmds_clk: Gate of HDMI TMDS clock.
45 h) tmds_clko: TMDS clock generated by HDMI-PHY.
/Documentation/devicetree/bindings/display/bridge/
Dsii9234.txt8 - avcc12-supply : TMDS Analog Supply Voltage (1.2V)
/Documentation/devicetree/bindings/clock/
Dexynos5260-clock.txt37 - "phyclk_hdmi_phy_tmds_clko" - hdmi phy tmds clock
/Documentation/fb/
Dviafb.rst166 - 12: 12-Bit LVDS or 12-Bit TMDS (default)
167 - 24: 24-Bit LVDS or 24-Bit TMDS
/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra124-pinmux.txt112 dp, rtck, sys, clk tmds, csi, dsi_b
/Documentation/media/uapi/v4l/
Dext-ctrls-dv.rst58 Rx Sense is the detection of pull-ups on the TMDS clock lines. This
/Documentation/gpu/
Dkms-properties.csv95 ,legacy TMDS PLL detect,"""tmds_pll""",ENUM,"{ ""driver"", ""bios"" }",-,TBD
/Documentation/devicetree/bindings/display/sunxi/
Dsun4i-drm.txt89 * tmds: TMDS clock
/Documentation/EDID/
Dedid.S83 Bit 0 Signal is compatible with VESA DFP 1.x TMDS CRGB,