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/Documentation/devicetree/bindings/media/
Daspeed-video.txt12 - clock-names: "vclk" and "eclk"
28 clock-names = "vclk", "eclk";
/Documentation/devicetree/bindings/display/
Damlogic,meson-vpu.yaml20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
53 The VENC Unit gets a Pixel Clocks (VCLK) from a dedicated HDMI PLL and clock
/Documentation/devicetree/bindings/display/exynos/
Dsamsung-fimd.txt40 - samsung,invert-vclk: video clock signal is inverted
60 VCLK(internal) __|??????|_____|??????|_____|??????|_____|??????|_____|??
/Documentation/gpu/
Dmeson.rst19 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |